Exploring the Design of 64- and 256-Core Power Efficient Nanophotonic Interconnect

IEEE Journal of Selected Topics in Quantum Electronics ◽

10.1109/jstqe.2009.2038075 ◽

2010 ◽

Vol 16 (5) ◽

pp. 1386-1393 ◽

Author(s):

R Morris ◽

A K Kodi

Keyword(s):

Power Efficient ◽

Nanophotonic Interconnect

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Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores

2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip ◽

10.1109/nocs.2010.30 ◽

2010 ◽

Author(s):

Randy Wayne Morris Jr. ◽

Avinash Karanth Kodi

Keyword(s):

High Performance ◽

Power Efficient ◽

Multi Level ◽

Nanophotonic Interconnect

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Determination of Adjacent Nodes for Power Efficient Wireless Sensor Networks

IEEJ Transactions on Electronics Information and Systems ◽

10.1541/ieejeiss.134.612 ◽

2014 ◽

Vol 134 (5) ◽

pp. 612-619 ◽

Author(s):

Kohei Kamimura ◽

Hitoshi Hayashi ◽

Takaaki Hatauchi

Keyword(s):

Wireless Sensor Networks ◽

Sensor Networks ◽

Wireless Sensor ◽

Power Efficient

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Faithfully Truncated Adder-Based Area-Power Efficient FIR Design with Predefined Output Accuracy

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.2019kep0010 ◽

2020 ◽

Vol E103.A (9) ◽

pp. 1063-1070 ◽

Author(s):

Jinghao YE ◽

Masao YANAGISAWA ◽

Youhua SHI

Keyword(s):

Power Efficient

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Power Efficient Routing in Mobile Adhoc Network (MANET) Using Connected Dominating Set

International Journal of Computer Sciences and Engineering ◽

10.26438/ijcse/v6i10.641649 ◽

2018 ◽

Vol 6 (10) ◽

pp. 641-649

Author(s):

B. Kalita ◽

A. K. Das ◽

A.U. Islam

Keyword(s):

Dominating Set ◽

Connected Dominating Set ◽

Power Efficient ◽

Mobile Adhoc Network ◽

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Credibility of Genetic Algorithm (GA) for Power Efficient Routing and Reactive Protocols in MANET

International Journal of Computer Sciences and Engineering ◽

10.26438/ijcse/v6i8.731734 ◽

2018 ◽

Vol 6 (8) ◽

pp. 731-734

Author(s):

Juhi Aggarwal ◽

Shelly .

Keyword(s):

Genetic Algorithm ◽

Power Efficient

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Power Efficient Implementation of Least Mean Square Algorithm Based FIR Filter Design Using FPGA

i-manager s Journal on Digital Signal Processing ◽

10.26634/jdp.2.1.2720 ◽

2014 ◽

Vol 2 (1) ◽

pp. 14-21

Author(s):

M. Devipriya ◽

◽

V. Saravanan ◽

N. Santhiyakumari ◽

◽

...

Keyword(s):

Filter Design ◽

Efficient Implementation ◽

Mean Square ◽

Least Mean Square ◽

Power Efficient ◽

Least Mean Square Algorithm ◽

Fir Filter Design

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A POWER EFFICIENT NMOS BASED FULL ADDER USING PTL LOGIC

i-manager s Journal on Circuits and Systems ◽

10.26634/jcir.5.4.13940 ◽

2017 ◽

Vol 5 (4) ◽

pp. 15

Author(s):

ISWARIYA S. ◽

RAJA M. VILASINI ◽

◽

Keyword(s):

Power Efficient

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Design techniques for power-efficient motor control

IET and Electronics Weekly Seminar on Programmable Hardware Systems ◽

10.1049/ic:20080617 ◽

2008 ◽

Author(s):

P. Trott

Keyword(s):

Motor Control ◽

Power Efficient ◽

Design Techniques

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Power-efficient topologies for wireless sensor networks with the fixed communication range

IET International Communication Conference on Wireless Mobile & Computing (CCWMC 2009) ◽

10.1049/cp.2009.1893 ◽

2009 ◽

Author(s):

Yan-liang Jin ◽

Zhu-ming Zhang ◽

Zhen Zhang ◽

Xuyuan Zhang

Keyword(s):

Wireless Sensor Networks ◽

Sensor Networks ◽

Wireless Sensor ◽

Power Efficient ◽

Communication Range

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Power-efficient and QoS-aware scheduling in bluetooth scatternet for wireless PANs

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2003.1261197 ◽

2003 ◽

Vol 49 (4) ◽

pp. 1067-1072 ◽

Author(s):

Yang-Ick Joo ◽

Tae-Jin Lee ◽

Doo Seop Eom ◽

Yeonwoo Lee ◽

Kyun Hyon Tchah

Keyword(s):

Power Efficient ◽

Bluetooth Scatternet

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