An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs

2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS) ◽

10.1109/lascas.2015.7250431 ◽

2015 ◽

Author(s):

Juan Nunez ◽

Antonio J. Gines ◽

Eduardo J. Peralias ◽

Adoracion Rueda

Keyword(s):

High Performance ◽

Clock Recovery ◽

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Design methodology for low-jitter differential clock recovery circuits in high performance ADCs

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-016-0870-6 ◽

2016 ◽

Vol 89 (3) ◽

pp. 593-609 ◽

Author(s):

Juan Núñez ◽

Antonio J. Ginés ◽

Eduardo J. Peralías ◽

Adoración Rueda

Keyword(s):

High Performance ◽

Design Methodology ◽

Clock Recovery ◽

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Design of low-jitter clock duty cycle stabilizer in high-performance pipelined ADC

Anti-counterfeiting, Security, and Identification ◽

10.1109/icasid.2012.6325310 ◽

2012 ◽

Author(s):

Mingwen Zhang ◽

Yongsheng Yin ◽

Honghui Deng ◽

Hongmei Chen

Keyword(s):

High Performance ◽

Pipelined Adc ◽

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A low-jitter video clock recovery circuit

Proceedings of 2010 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2010.5537240 ◽

2010 ◽

Author(s):

Hossam Ali ◽

Emad Hegazi

Keyword(s):

Clock Recovery ◽

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A 20-Gbps low jitter analog clock recovery circuit for ultra-wide band Radio systems

2014 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2014.6865435 ◽

2014 ◽

Author(s):

M. Hamouda ◽

G. Fischer ◽

R. Weigel ◽

A. Baenisch ◽

T. Ussmueller

Keyword(s):

Wide Band ◽

Clock Recovery ◽

Ultra Wide Band ◽

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Development of a high performance tigger generator with low jitter, fast rise time

2015 IEEE International Conference on Plasma Sciences (ICOPS) ◽

10.1109/plasma.2015.7179664 ◽

2015 ◽

Author(s):

Weidong Ding ◽

Yanan Wang ◽

Yang Gou ◽

Xu Zhong ◽

Ruoyu Han ◽

...

Keyword(s):

Rise Time ◽

High Performance ◽

Fast Rise Time ◽

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Low jitter clock driver for high-performance pipeline ADC

2013 IEEE 10th International Conference on ASIC ◽

10.1109/asicon.2013.6812047 ◽

2013 ◽

Author(s):

Yun Chen ◽

Chaojie Fan ◽

Jianjun Zhou

Keyword(s):

High Performance ◽

Pipeline Adc ◽

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High performance and polarisation-insensitive BER assessment of a 42.66 Gbit/s all-optical clock recovery

2008 34th European Conference on Optical Communication ◽

10.1109/ecoc.2008.4729124 ◽

2008 ◽

Author(s):

M. N. Ngo ◽

V. Roncin ◽

Q. T. Le ◽

S. Lobo ◽

M. Gay ◽

...

Keyword(s):

High Performance ◽

Optical Clock ◽

Clock Recovery ◽

All Optical ◽

Optical Clock Recovery

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High performance thyratron driver with low jitter

Review of Scientific Instruments ◽

10.1063/1.2768943 ◽

2007 ◽

Vol 78 (8) ◽

pp. 086107 ◽

Author(s):

Rishi Verma ◽

P. Lee ◽

S. V. Springham ◽

T. L. Tan ◽

R. S. Rawat

Keyword(s):

High Performance ◽

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A low jitter 1.25 GHz CMOS analog PLL for clock recovery

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187) ◽

10.1109/iscas.1998.704228 ◽

2002 ◽

Author(s):

Lin Wu ◽

W.C. Black

Keyword(s):

Clock Recovery ◽

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Low-jitter differential clock driver circuits for high-performance high-resolution ADCs

2015 Conference on Design of Circuits and Integrated Systems (DCIS) ◽

10.1109/dcis.2015.7388558 ◽

2015 ◽

Author(s):

Juan Nunez ◽

Antonio J. Gines ◽

Eduardo J. Peralias ◽

Adoracion Rueda

Keyword(s):

High Resolution ◽

High Performance ◽

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