A Controller Hardware-in-the-Loop Testbed: Verification and Validation of Microgrid Control Architectures

2020 ◽  
Vol 8 (3) ◽  
pp. 92-100
Author(s):  
Siddhartha Nigam ◽  
Olaoluwapo Ajala ◽  
Alejandro D. Dominguez-Garcia
Author(s):  
Amir Valibeygi ◽  
Raymond A. de Callafon ◽  
Mark Stanovich ◽  
Michael Sloderbeck Karl Schoder ◽  
James Langston Isaac Leonard ◽  
...  

Author(s):  
Drew J. Rankin ◽  
Jin Jiang

This paper presents the performance of shutdown system one (SDS1) implemented on a programmable logic controller (PLC) within real-time hardware-in-the-loop (HIL) simulation. SDS1 evaluation is focused on steam generator (SG) level low trip scenarios. A comparison of the findings with simulated expected plant operation is performed. An Invensys Triconex Tricon v9 safety PLC is interfaced to a real-time nuclear power plant (NPP) simulation suite (DarlSIM), replicating the operation of the Darlington NPP SDS1. Design basis accidents (DBA) associated with SDS1 regulatory standards are developed and applied to the two simulation environments. HIL simulation is a preferred method for testing systems prior to installation and is necessary to ensure proper SDS verification and validation. The performance of the Tricon v9 PLC, the HIL simulation platform and the two simulation environments are evaluated.


2021 ◽  
Author(s):  
J. Wild ◽  
D. Pampliega ◽  
M. Rahmani ◽  
P.-J. Le Quellec ◽  
A. Pal ◽  
...  

2020 ◽  
Vol 30 ◽  
Author(s):  
IVAN PEREZ ◽  
HENRIK NILSSON

Abstract Many types of interactive applications, including reactive systems implemented in hardware, interactive physics simulations and games, raise particular challenges when it comes to testing and debugging. Reasons include de facto lack of reproducibility and difficulties of automatically generating suitable test data. This paper demonstrates that certain variants of functional reactive programming (FRP) implemented in pure functional languages can mitigate such difficulties by offering referential transparency at the level of whole programs. This opens up for a multi-pronged approach for assisting with testing and debugging that works across platforms, including assertions based on temporal logic, recording and replaying of runs (also from deployed code), and automated random testing using QuickCheck. When combined with extensible forms of FRP that allow for constrained side effects, it allows us to not only validate software simulations but to analyse the effect of faults in reactive systems, confirm the efficacy of fault tolerance mechanisms and perform software- and hardware-in-the-loop testing. The approach has been validated on non-trivial systems implemented in several existing FRP implementations, by means of careful debugging using a tool that allows the test or simulation under scrutiny to be controlled, moving along the execution time line, and pin-pointing of violations of assertions on personal computers as well as external devices.


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