A digital background calibration technique for pipelined ADC using redundant stages

2003 46th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2003.1562205 ◽

2006 ◽

Author(s):

Jaeki Yoo ◽

E. Lee ◽

E.E. Swartzlander

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Digital Background Calibration

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An adaptive digital background calibration technique using variable step size LMS for pipelined ADC

2014 9th International Symposium on Communication Systems, Networks & Digital Sign (CSNDSP) ◽

10.1109/csndsp.2014.6923943 ◽

2014 ◽

Author(s):

Nahla T. Abou-El-Kheir ◽

Mohmed Abbas ◽

Mohamed Essam Khedr

Keyword(s):

Variable Step Size ◽

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Step Size ◽

Digital Background Calibration ◽

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A new digital background calibration technique for pipelined ADC

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1328117 ◽

2004 ◽

Author(s):

K. El-Sankary ◽

M. Sawan

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Digital Background Calibration

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A fast power efficient equalization-based digital background calibration technique for pipelined ADC

2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) ◽

10.1109/mixdes.2014.6872166 ◽

2014 ◽

Author(s):

Nahla T. Abou-El-Kheir ◽

Mohammed Essam Khedr ◽

Mohamed Abbas

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Power Efficient ◽

Digital Background Calibration ◽

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A Novel Digital Background Calibration Technique for 16 bit SHA-less Multibit Pipelined ADC

Advances in Electrical and Electronic Engineering ◽

10.15598/aeee.v14i5.1592 ◽

2016 ◽

Vol 14 (5) ◽

Author(s):

Swina Narula ◽

Munish Vashistha ◽

Sujata Pandey

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Calibration Technique ◽

Digital Background Calibration

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Digital Background Calibration for a 14-bit 100-MS/s Pipelined ADC Using Signal-Dependent Dithering

IEICE Transactions on Electronics ◽

10.1587/transele.e97.c.207 ◽

2014 ◽

Vol E97.C (3) ◽

pp. 207-214

Author(s):

Zhao-xin XIONG ◽

Min CAI ◽

Xiao-Yong HE ◽

Yun YANG

Keyword(s):

Pipelined Adc ◽

Background Calibration ◽

Digital Background Calibration

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A digital-background calibration technique for minimizing timing-error effects in time-interleaved ADCs

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ◽

10.1109/82.850419 ◽

2000 ◽

Vol 47 (7) ◽

pp. 603-613 ◽

Author(s):

Huawen Jin ◽

E.K.F. Lee

Keyword(s):

Background Calibration ◽

Calibration Technique ◽

Timing Error ◽

Digital Background Calibration ◽

Time Interleaved

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12 bit 3.072 GS/s 32‐way time‐interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal–oxide–semiconductor

IET Circuits Devices & Systems ◽

10.1049/iet-cds.2019.0069 ◽

2020 ◽

Vol 14 (2) ◽

pp. 182-191

Author(s):

Waleed Hussain Siddiqui ◽

Goang Seong Choi

Keyword(s):

Metal Oxide ◽

Complementary Metal Oxide Semiconductor ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Pipelined Adc ◽

Digital Receiver ◽

Background Calibration ◽

Digital Background Calibration ◽

Time Interleaved

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A digital background calibration technique for pipelined analog-to-digital converters

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. ◽

10.1109/iscas.2003.1205705 ◽

2003 ◽

Author(s):

Hung-Chih Liu ◽

Zwei-Mei Lee ◽

Jieh-Tsorng Wu

Keyword(s):

Analog To Digital Converters ◽

Background Calibration ◽

Calibration Technique ◽

Analog To Digital ◽

Digital Background Calibration

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All-digital background calibration technique for timing mismatch of time-interleaved ADCs

Integration ◽

10.1016/j.vlsi.2016.11.003 ◽

2017 ◽

Vol 57 ◽

pp. 45-51 ◽

Author(s):

Hongmei Chen ◽

Yunsheng Pan ◽

Yongsheng Yin ◽

Fujiang Lin

Keyword(s):

Background Calibration ◽

Calibration Technique ◽

Digital Background Calibration ◽

Time Interleaved

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A digital background calibration technique for SAR ADC based on capacitor swapping

IEICE Electronics Express ◽

10.1587/elex.11.20140325 ◽

2014 ◽

Vol 11 (12) ◽

pp. 20140325-20140325

Author(s):

Ling Du ◽

Ning Ning ◽

Shuangyi Wu ◽

Qi Yu ◽

Yang Liu

Keyword(s):

Sar Adc ◽

Background Calibration ◽

Calibration Technique ◽

Digital Background Calibration

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