scholarly journals Hybrid Time-of-Flight Image Sensors for Middle-Range Outdoor Applications

Author(s):  
S. Kawahito ◽  
K. Yasutomi ◽  
K. Mars
Author(s):  
Markus Dielacher ◽  
Martin Flatscher ◽  
Reinhard Gabl ◽  
Richard Gaggl ◽  
Dirk Offenberg ◽  
...  

Author(s):  
Andreas Suss ◽  
Christian Nitta ◽  
Andreas Spickermann ◽  
Daniel Durini ◽  
Gabor Varga ◽  
...  

2020 ◽  
Vol 2020 (7) ◽  
pp. 103-1-103-6
Author(s):  
Taesub Jung ◽  
Yonghun Kwon ◽  
Sungyoung Seo ◽  
Min-Sun Keel ◽  
Changkeun Lee ◽  
...  

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.


2009 ◽  
Author(s):  
Andrew D. Payne ◽  
Adrian A. Dorrington ◽  
Michael J. Cree ◽  
Dale A. Carnegie

2015 ◽  
Author(s):  
Adrian Driewer ◽  
Bedrich J. Hosticka ◽  
Andreas Spickermann ◽  
Holger Vogt

Sensors ◽  
2018 ◽  
Vol 18 (10) ◽  
pp. 3413 ◽  
Author(s):  
Augusto Ximenes ◽  
Preethi Padmanabhan ◽  
Edoardo Charbon

Direct time-of-flight (dTOF) image sensors require accurate and robust timing references for precise depth calculation. On-chip timing references are well-known and understood, but for imaging systems where several thousands of pixels require seamless references, area and power consumption limit the use of more traditional synthesizers, such as phase/delay-locked loops (PLLs/DLLs). Other methods, such as relative timing measurement (start/stop), require constant foreground calibration, which is not feasible for outdoor applications, where conditions of temperature, background illumination, etc. can change drastically and frequently. In this paper, a scalable reference generation and synchronization is provided, using minimum resources of area and power, while being robust to mismatches. The suitability of this approach is demonstrated through the design of an 8 × 8 time-to-digital converter (TDC) array, distributed over 1.69 mm2, fabricated using TSMC 65 nm technology (1.2 V core voltage and 4 metal layers—3 thin + 1 thick). Each TDC is based on a ring oscillator (RO) coupled to a ripple counter, occupying a very small area of 550 μ m2, while consuming 500 μ W of power, and has 2 μ s range, 125 ps least significant bit (LSB), and 14-bit resolution. Phase and frequency locking among the ROs is achieved, while providing 18 dB phase noise improvement over an equivalent individual oscillator. The integrated root mean square (RMS) jitter is less than 9 ps, the instantaneous frequency variation is less than 0.11%, differential nonlinearity (DNL) is less than 2 LSB, and integral nonlinearity (INL) is less than 3 LSB.


2017 ◽  
Vol 64 (11) ◽  
pp. 2821-2834 ◽  
Author(s):  
Ion Vornicu ◽  
Ricardo Carmona-Galan ◽  
Angel Rodriguez-Vazquez

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