Integrating Resonator to Enhance Magnetometer Microelectromechanical System Implementation with ASIC Compatible CMOS 0.18 μm Process

In this study, a multi-function microelectromechanical system (MEMS) was integrated with a MEMS oscillator, using the resonant frequency oscillation characteristics of the oscillator to provide the Lorentz current of the magnetometer to enhance a large dynamic range of reading, which eliminates the off-chip clock and current generator. The resonant frequency can be adjusted by adjusting the bias voltage of the oscillator to further adjust the sensitivity of the magnetometer. With the mechanical Q value characteristic, a great dynamic range can be achieved. In addition, using the readout circuit of the nested chopper and correlated double-sampling (CDS) to reduce the noise and achieve a smaller resolution, the calibration circuit compensates for errors caused by the manufacturing process. The frequency of the tuning range of the proposed structure is 17,720–19,924 Hz, and the tuning range of the measurement result is 110,620.36 ppm. The sensitivities of the x-, y-, and z-axes of the magnetometer with driving current of 2 mA are 218.3, 74.33, and 7.5 μV/μT for ambient pressure of 760 torr. The resolutions of the x-, y-, and z-axes of the magnetometer with driving current of 2 mA are 3.302, 9.69, and 96 nT/√Hz for ambient pressure of 760 torr.

A Fast Lock All-Digital MDLL Using a Cyclic Vernier TDC for Burst-Mode Links

An all-digital multiplying delay-locked loop (MDLL)-based clock multiplier featuring a time-to-digital converter (TDC) to achieve fast power-on capability is presented. The proposed MDLL adopts a new offset-free cyclic Vernier TDC to achieve a fast lock time of 15 reference clock cycles while maintaining a wide detection range and high resolution. The proposed offset-free TDC also uses a correlated double sampling technique to remove mismatch and offset issues, resulting in low jitter characteristics. After the MDLL is quickly locked, the TDC is turned off, and it goes into delta-sigma modulator (DSM)-based sequential tracking mode to reduce power consumption and improve jitter performance. Implemented in a 65-nm 1.0-V CMOS process, the proposed MDLL occupies an active area of 0.043 mm2 and generates a 2.4-GHz output clock from a 75-MHz reference clock (multiplication factor N = 32). It achieves an effective peak-to-peak jitter of 9.4 ps and consumes 3.3 mW at 2.4 GHz.

In-Pixel Temperature Sensors with an Accuracy of ±0.25 °C, a 3σ Variation of ±0.7 °C in the Spatial Domain and a 3σ Variation of ±1 °C in the Temporal Domain

This article presents in-pixel (of a CMOS image sensor (CIS)) temperature sensors with improved accuracy in the spatial and the temporal domain. The goal of the temperature sensors is to be used to compensate for dark (current) fixed pattern noise (FPN) during the exposure of the CIS. The temperature sensors are based on substrate parasitic bipolar junction transistor (BJT) and on the nMOS source follower of the pixel. The accuracy of these temperature sensors has been improved in the analog domain by using dynamic element matching (DEM), a temperature independent bias current based on a bandgap reference (BGR) with a temperature independent resistor, correlated double sampling (CDS), and a full BGR bias of the gain amplifier. The accuracy of the bipolar based temperature sensor has been improved to a level of ±0.25 °C, a 3σ variation of ±0.7 °C in the spatial domain, and a 3σ variation of ±1 °C in the temporal domain. In the case of the nMOS based temperature sensor, an accuracy of ±0.45 °C, 3σ variation of ±0.95 °C in the spatial domain, and ±1.4 °C in the temporal domain have been acquired. The temperature range is between −40 °C and 100 °C.

A 4-tap global shutter pixel with enhanced IR sensitivity for VGA time-of-flight CMOS image sensors

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.