Thermal Cycle is a common test to ensure solder joints and interconnects reliability of astronautic electronic products through eliminating infant failures caused by latent defects. Both over-testing and under-testing risks have to be considered sufficiently during the constituting of thermal cyclic test scheme. Consequently, the methodology presented in this paper offers a novel way to evaluate these risks. Safety analysis on the thermal cyclic test scheme can prevent unnecessary operating life consumption, while the effectiveness analysis can ensure the sufficiency of the test and get rid of the defective products. Additionally, 3 thermal cyclic test schemes which can be applied on a signal acquisition board were analyzed with this methodology individually, and the most felicitous test scheme was identified at the end of this procedure.