An improved feedthrough logic for low power circuit design

2012 1st International Conference on Recent Advances in Information Technology (RAIT) ◽

10.1109/rait.2012.6194582 ◽

2012 ◽

Author(s):

Sauvagya Ranjan Sahoo ◽

Kamala Kanta Mahapatra

Keyword(s):

Low Power ◽

Circuit Design ◽

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The Pentium processor-90/100, microarchitecture and low power circuit design

Proceedings of the 8th International Conference on VLSI Design ◽

10.1109/icvd.1995.512103 ◽

2002 ◽

Author(s):

G. Debnath ◽

K. Debnath ◽

R. Fernando

Keyword(s):

Low Power ◽

Circuit Design ◽

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Low-Power Circuit Design for Cardiac Data Mining in Medical Sensor Networks

Handbook on Sensor Networks ◽

10.1142/9789812837318_0035 ◽

2010 ◽

pp. 853-882

Author(s):

Fei Hu ◽

Alexandru Samachisa ◽

Marcin Lukowiak ◽

Daniel Philips ◽

Yang Xiao

Keyword(s):

Data Mining ◽

Sensor Networks ◽

Low Power ◽

Circuit Design ◽

Power Circuit ◽

Medical Sensor Networks

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Ultra Low Power Circuit Design

Materials Today Proceedings ◽

10.1016/j.matpr.2015.10.051 ◽

2015 ◽

Vol 2 (9) ◽

pp. 4468-4473

Author(s):

N.Geetha Rani ◽

P.Chandrasekhar Reddy

Keyword(s):

Low Power ◽

Circuit Design ◽

Power Circuit ◽

Ultra Low Power

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Comparative Analysis of Carbon Nanotube Field Effect Transistor and Nanowire Transistor for Low Power Circuit Design

Journal of Nanoelectronics and Optoelectronics ◽

10.1166/jno.2016.1913 ◽

2016 ◽

Vol 11 (3) ◽

pp. 388-393 ◽

Author(s):

Amandeep Singh ◽

Mamta Khosla ◽

Balwinder Raj

Keyword(s):

Comparative Analysis ◽

Carbon Nanotube ◽

Low Power ◽

Circuit Design ◽

Field Effect ◽

Field Effect Transistor ◽

Power Circuit ◽

Nanowire Transistor ◽

Effect Transistor

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Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop

2007 44th ACM/IEEE Design Automation Conference ◽

10.1109/dac.2007.375298 ◽

2007 ◽

Author(s):

Kunhyuk Kang ◽

Keejong Kim ◽

Kaushik Roy

Keyword(s):

Low Power ◽

Circuit Design ◽

Design Methodology ◽

Phase Locked Loop ◽

Power Circuit ◽

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Variation resilient low-power circuit design methodology using on-chip phase locked loop

2007 44th ACM/IEEE Design Automation Conference ◽

10.1145/1278480.1278710 ◽

2007 ◽

Author(s):

Kunhyuk Kang ◽

Keejong Kim ◽

Kaushik Roy

Keyword(s):

Low Power ◽

Circuit Design ◽

Design Methodology ◽

Phase Locked Loop ◽

Power Circuit ◽

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Low Power Circuit Design for Dynamic Comparator

International Journal of Performability Engineering ◽

10.23940/ijpe.21.05.p4.444450 ◽

2021 ◽

Vol 17 (5) ◽

pp. 444

Keyword(s):

Low Power ◽

Circuit Design ◽

Dynamic Comparator ◽

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A CMOS adiabatic logic for low power circuit design

Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits APASIC-04 ◽

10.1109/apasic.2004.1349493 ◽

2004 ◽

Author(s):

Hee-sup Song ◽

Jin-ku Kang

Keyword(s):

Low Power ◽

Circuit Design ◽

Power Circuit ◽

Adiabatic Logic

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Low-Power Circuit Design

Sensors and Low Power Signal Processing ◽

10.1007/978-0-387-79392-4_3 ◽

2009 ◽

pp. 31-43

Author(s):

Syed Kamrul Islam ◽

Mohammad Rafiqul Haider

Keyword(s):

Low Power ◽

Circuit Design ◽

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An EEPROM model for low power circuit design and simulation

Proceedings of 1994 IEEE International Electron Devices Meeting ◽

10.1109/iedm.1994.383441 ◽

2002 ◽

Author(s):

Tat-Kwan Yu ◽

J. Higman ◽

C. Cavins ◽

Kuo-Tung Chang ◽

M. Orlowski

Keyword(s):

Low Power ◽

Circuit Design ◽

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