Operational transconductance amplifier-based comparator for high frequency applications using 22 nm FinFET technology

<p><span>Fin field-effect transistor (FinFET) based analog circuits are gaining importance over metal oxide semiconductor field effect transistor (MOSFET) based circuits with stability and high frequency operations. Comparator that forms the sub block of most of the analog circuits is designed using operational transconductance amplifier (OTA). The OTA is designed using new design procedures and the comparator circuit is designed integrating the sub circuits with OTA. The building blocks of the comparator design such as input level shifter, differential pair with cascode stage and class AB amplifier for output swing are designed and integrated. Folded cascode circuit is used in the feedback path to maintain the common mode input value to a constant, so that the differential pair amplifies the differential signal. The gain of the comparator is achieved to be greater than 100 dB, with phase margin of 65°, common mode rejection ratio (CMRR) of above 70 dB and output swing from rail to rail. The circuit provides unity gain bandwidth of 5 GHz and is suitable for high sampling rate data converter circuits.</span></p>

The impact of channel fin width on electrical characteristics of Si-FinFET

<span>This paper studies the impact of fin width of channel on temperature and electrical characteristics of fin field-effect transistor (FinFET). The simulation tool multi-gate field effect transistor (MuGFET) has been used to examine the FinFET characteristics. Transfer characteristics with various temperatures and channel fin width (W_F=5, 10, 20, 40, and 80 nm) are at first simulated in this study. The results show that the increasing of environmental temperature tends to increase threshold voltage, while the subthreshold swing (SS) and drain-induced barrier lowering (DIBL) rise with rising working temperature. Also, the threshold voltage decreases with increasing channel fin width of transistor, while the SS and DIBL increase with increasing channel fin width of transistor, at minimum channel fin width, the SS is very near to the best and ideal then its value grows and going far from the ideal value with increasing channel fin width. So, according to these conditions, the minimum value as possible of fin width is the preferable one for FinFET with better electrical characteristics.</span>

Towards Multi-Analyte Detection with Field-Effect Capacitors Modified with Tobacco Mosaic Virus Bioparticles as Enzyme Nanocarriers

Utilizing an appropriate enzyme immobilization strategy is crucial for designing enzyme-based biosensors. Plant virus-like particles represent ideal nanoscaffolds for an extremely dense and precise immobilization of enzymes, due to their regular shape, high surface-to-volume ratio and high density of surface binding sites. In the present work, tobacco mosaic virus (TMV) particles were applied for the co-immobilization of penicillinase and urease onto the gate surface of a field-effect electrolyte-insulator-semiconductor capacitor (EISCAP) with a p-Si-SiO2-Ta2O5 layer structure for the sequential detection of penicillin and urea. The TMV-assisted bi-enzyme EISCAP biosensor exhibited a high urea and penicillin sensitivity of 54 and 85 mV/dec, respectively, in the concentration range of 0.1–3 mM. For comparison, the characteristics of single-enzyme EISCAP biosensors modified with TMV particles immobilized with either penicillinase or urease were also investigated. The surface morphology of the TMV-modified Ta2O5-gate was analyzed by scanning electron microscopy. Additionally, the bi-enzyme EISCAP was applied to mimic an XOR (Exclusive OR) enzyme logic gate.