A fully-integrated 60 GHz VCO in l3Onm SOI-CMOS on high-resistivity substrate

Author(s):  
B. Payet ◽  
P. Vincent ◽  
I. O'Connor ◽  
F. Gaffiot
2011 ◽  
Vol 3 (2) ◽  
pp. 139-145 ◽  
Author(s):  
Srdjan Glisic ◽  
J. Christoph Scheytt ◽  
Yaoming Sun ◽  
Frank Herzel ◽  
Ruoyu Wang ◽  
...  

A fully integrated transmitter (TX) and receiver (RX) front-end chipset, produced in 0.25 µm SiGe:C bipolar and complementary metal oxide semiconductor (BiCMOS) technology, is presented. The front-end is intended for high-speed wireless communication in the unlicensed ISM band of 9 GHz around 60 GHz. The TXand RX features a modified heterodyne topology with a sliding intermediate frequency. The TX features a 12 GHz in-phase and quadrature (I/Q) mixer, an intermediate frequency (IF) amplifier, a phase-locked loop, a 60 GHz mixer, an image-rejection filter, and a power amplifier. The RX features a low-noise amplifier (LNA), a 60 GHz mixer, a phase-locked loop (PLL), and an IF demodulator. The measured 1-dB compression point at the TX output is 12.6 dBm and the saturated power is 16.2 dBm. The LNA has measured noise figure of 6.5 dB at 60 GHz. Error-free data transmission with a 16 quadrature amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM) signal and data rate of 3.6 Gbit/s (without coding 4.8 Gbit/s) over 15 m was demonstrated. This is the best reported result regarding both the data rate and transmission distance in SiGe and CMOS without beamforming.


2010 ◽  
Vol 58 (3) ◽  
pp. 706-713 ◽  
Author(s):  
Woosung Lee ◽  
Jaeheung Kim ◽  
Choon Sik Cho ◽  
Young Joong Yoon

Author(s):  
Florian Starzer ◽  
Markus Ortner ◽  
Hans Peter Forstner ◽  
Reinhard Feger ◽  
Andreas Stelzer

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