High-Throughput and Low-Power Architectures for the AV1 Arithmetic Encoder

Mapping Intimacies ◽

10.1109/sbcci53441.2021.9529994 ◽

2021 ◽

Author(s):

Tulio Pereira Bitencourt ◽

Fabio Luis Livi Ramos ◽

Sergio Bampi

Keyword(s):

Low Power ◽

High Throughput ◽

Low Power Architectures

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High throughput data acquisition with InfiniBand on x86 low-power architectures for the LHCb upgrade

2016 IEEE-NPSS Real Time Conference (RT) ◽

10.1109/rtc.2016.7543136 ◽

2016 ◽

Author(s):

D. Cesini ◽

A. Ferraro ◽

A. Falabella ◽

F. Giacomini ◽

M. Manzali ◽

...

Keyword(s):

Low Power ◽

Data Acquisition ◽

High Throughput ◽

High Throughput Data ◽

Low Power Architectures

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High-Throughput and Low-Power Architectures for Reed Solomon Decoder

Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems and Computers, 2005. ◽

10.1109/acssc.2005.1599906 ◽

2006 ◽

Author(s):

A. Kumar ◽

S. Sawitzki

Keyword(s):

Low Power ◽

High Throughput ◽

Low Power Architectures

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Revisiting HyperDimensional Learning for FPGA and Low-Power Architectures

2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA) ◽

10.1109/hpca51647.2021.00028 ◽

2021 ◽

Author(s):

Mohsen Imani ◽

Zhuowen Zou ◽

Samuel Bosch ◽

Sanjay Anantha Rao ◽

Sahand Salamat ◽

...

Keyword(s):

Low Power ◽

Low Power Architectures

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Design A Low Power and High Throughput 130nm Full Adder Utilising Exclusive-OR And Exclusive- NOR Gates

Journal of VLSI Circuits and Systems ◽

10.31838/jvcs/03.02.05 ◽

2021 ◽

Vol 3 (2) ◽

Keyword(s):

Low Power ◽

High Throughput ◽

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A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process

2016 International Conference on IC Design and Technology (ICICDT) ◽

10.1109/icicdt.2016.7542042 ◽

2016 ◽

Author(s):

Xuan-Thuan Nguyen ◽

Hong-Thu Nguyen ◽

Cong-Kha Pham

Keyword(s):

Low Power ◽

High Throughput ◽

Low Power Design ◽

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High Performance and Low Power Architectures: GPU vs. FPGA for Fast Factorized Backprojection

2017 Fifth International Symposium on Computing and Networking (CANDAR) ◽

10.1109/candar.2017.101 ◽

2017 ◽

Author(s):

M. Wielage ◽

F. Cholewa ◽

C. Fahnemann ◽

P. Pirsch ◽

H. Blume

Keyword(s):

Low Power ◽

High Performance ◽

Low Power Architectures

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Design and Implementation of Low-Power High-throughput PRNGs for Security Applications

2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) ◽

10.1109/vlsid.2019.00123 ◽

2019 ◽

Author(s):

Bikram Paul ◽

Apratim Khobragade ◽

Soumith Javvaji Sai ◽

Sushree Sila P. Goswami ◽

Sunil Dutt ◽

...

Keyword(s):

Low Power ◽

High Throughput ◽

Security Applications ◽

Design And Implementation

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Low Power Architectures Using Localised Non-Volatile Memory and Selective Power Shut-Down

2006 IEEE International Conference on Acoustics Speed and Signal Processing Proceedings ◽

10.1109/iscas.2006.1692601 ◽

2006 ◽

Author(s):

R.M. Secareanu ◽

O. Hartin

Keyword(s):

Low Power ◽

Non Volatile Memory ◽

Volatile Memory ◽

Low Power Architectures

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Low-power High-throughput Deblocking Filter Architecture for H.264/AVC

2009 International Conference on Electronic Computer Technology ◽

10.1109/icect.2009.109 ◽

2009 ◽

Author(s):

NamThang Ta ◽

JinSeon Youn ◽

HuiGon Kim ◽

JunRim Choi ◽

Seung-Soo Han

Keyword(s):

Low Power ◽

High Throughput ◽

Deblocking Filter ◽

Filter Architecture

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Socrates-D 2.0: A Low Power High Throughput Architecture for Deep Network Training

2018 International Joint Conference on Neural Networks (IJCNN) ◽

10.1109/ijcnn.2018.8489378 ◽

2018 ◽

Author(s):

Yangjie Qi ◽

Raqibul Hasan ◽

Tarek M. Taha

Keyword(s):

Low Power ◽

High Throughput ◽

Deep Network ◽

Network Training

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