A 2 GHz 2 mW SiGe BiCMOS frequency divider with new latch-based structure

Author(s):  
O. Mazouffre ◽  
J.-B. Begueret ◽  
A. Cathelin ◽  
D. Belot ◽  
Y. Deval
2009 ◽  
Vol 51 (8) ◽  
pp. 1970-1973 ◽  
Author(s):  
Sheng-Lyang Jang ◽  
Jyun-Yan Wun ◽  
Cheng-Chen Liu ◽  
Miin-Horng Juang

2011 ◽  
Vol 47 (14) ◽  
pp. 804-805 ◽  
Author(s):  
A.Y.-K. Chen ◽  
Y.-K. Chen ◽  
J. Lin ◽  
Y. Baeyens

2006 ◽  
Author(s):  
Noorfazila Kamal ◽  
Yingbo Zhu ◽  
Leonard T. Hall ◽  
Said F. Al-Sarawi ◽  
Craig Burnet ◽  
...  

Author(s):  
Arzu Ergintav ◽  
Johannes Borngraber ◽  
Bernd Heinemann ◽  
Holger Rucker ◽  
Frank Herzel ◽  
...  

2007 ◽  
Vol 2007 ◽  
pp. 1-8 ◽  
Author(s):  
Klaus Schmalz ◽  
Eckard Grass ◽  
Frank Herzel ◽  
Maxim Piz

This paper presents a 5 GHz wideband I/Q modulator/demodulator for 650 MHz OFDM signal bandwidth, which is integrated with a 5 GHz phase locked loop for I/Q generation. The quadrature signals are derived from a 10 GHz CMOS VCO followed by a bipolar frequency divider. The phase noise at 1 MHz offset is −112 dBc/Hz for the modulator as well as for the demodulator. The chips were produced in a 0.25 μm SiGe BiCMOS technology. The signal-to-noise ratio (SNR) of transmitted/received OFDM signal and the corresponding I/Q mismatch versus baseband frequency are given. The modulator achieves an SNR of 22–23 dB, and the demodulator realizes an SNR up to 22 dB. The modulator reaches a data rate of 2.16 Gbit/s using 64 QAM OFDM, and the demodulator realizes 1.92 Gbits/s.


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