ESD Protection Design to Overcome Internal Damage on Interface Circuits of a CMOS IC With Multiple Separated Power Pins

2004 ◽  
Vol 27 (3) ◽  
pp. 445-451 ◽  
Author(s):  
M.-D. Ker ◽  
C.-Y. Chang ◽  
Y.-S. Chang
Keyword(s):  
Interface Circuits ◽  
Internal Damage ◽  
Esd Protection ◽  
Cmos Ic

Latchup test-induced failure within ESD protection diodes in a high-voltage CMOS IC product

2004 ◽  
Author(s):  
I-Cheng Lin ◽  
Chuan-Jane Chao ◽  
Ming-Dou Ker ◽  
Jen-Chou Tseng ◽  
Chung-Ti Hsu ◽  
...  
Keyword(s):  
High Voltage ◽  
Esd Protection ◽  
Cmos Ic

Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

2003 ◽  
Vol 43 (8) ◽  
pp. 1295-1301 ◽  
Author(s):  
I-Cheng Lin ◽  
Chih-Yao Huang ◽  
Chuan-Jane Chao ◽  
Ming-Dou Ker
Keyword(s):  
High Voltage ◽  
Esd Protection ◽  
Cmos Ic ◽  
Protection Circuit ◽  
On Chip
Sign in / Sign up

Export Citation Format

Share Document