A Power-Area Efficient Geometry Engine With Low-Complexity Subdivision Algorithm for 3-D Graphics System

2011 ◽  
Vol 58 (9) ◽  
pp. 2211-2224 ◽  
Author(s):  
Lan-Da Van ◽  
Ten-Yao Sheu
Keyword(s):  
Low Complexity ◽  
Subdivision Algorithm ◽  
Geometry Engine ◽  
Area Efficient

scholarly journals High Area-Efficient Parallel Encoder with Compatible Architecture for 5G LDPC Codes

Symmetry ◽  
2021 ◽  
Vol 13 (4) ◽  
pp. 700
Author(s):  
Yufei Zhu ◽  
Zuocheng Xing ◽  
Zerun Li ◽  
Yang Zhang ◽  
Yifan Hu
Keyword(s):  
High Performance ◽  
Ldpc Codes ◽  
Low Complexity ◽  
Cmos Technology ◽  
Area Efficiency ◽  
Prior Art ◽  
New Radio ◽  
High Area ◽  
Significant Area ◽  
Area Efficient

This paper presents a novel parallel quasi-cyclic low-density parity-check (QC-LDPC) encoding algorithm with low complexity, which is compatible with the 5th generation (5G) new radio (NR). Basing on the algorithm, we propose a high area-efficient parallel encoder with compatible architecture. The proposed encoder has the advantages of parallel encoding and pipelined operations. Furthermore, it is designed as a configurable encoding structure, which is fully compatible with different base graphs of 5G LDPC. Thus, the encoder architecture has flexible adaptability for various 5G LDPC codes. The proposed encoder was synthesized in a 65 nm CMOS technology. According to the encoder architecture, we implemented nine encoders for distributed lifting sizes of two base graphs. The eperimental results show that the encoder has high performance and significant area-efficiency, which is better than related prior art. This work includes a whole set of encoding algorithm and the compatible encoders, which are fully compatible with different base graphs of 5G LDPC codes. Therefore, it has more flexible adaptability for various 5G application scenarios.

Low complexity and area efficient reconfigurable multimode interleaver address generator for multistandard radios

2016 ◽  
Vol 10 (2) ◽  
pp. 59-68 ◽  
Author(s):  
Nithish Kumar Venkatachalam ◽  
Lakshminarayanan Gopalakrishnan ◽  
Mathini Sellathurai
Keyword(s):  
Low Complexity ◽  
Address Generator ◽  
Area Efficient

scholarly journals Energy-efficient, area-efficient, high-accuracy and low-complexity switching scheme for SAR ADC

2017 ◽  
Vol 14 (11) ◽  
pp. 20170428-20170428 ◽  
Author(s):  
Yunfeng Hu ◽  
Zichuan Yi ◽  
Zhihong He ◽  
Bin Li
Keyword(s):  
Energy Efficient ◽  
Low Complexity ◽  
High Accuracy ◽  
Sar Adc ◽  
Switching Scheme ◽  
Area Efficient
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