Design of High-Throughput Fixed-Point Complex Reciprocal/Square-Root Unit

2010 ◽  
Vol 57 (8) ◽  
pp. 627-631 ◽  
Author(s):  
Dong Wang ◽  
Miloš D Ercegovac ◽  
Nanning Zheng
2020 ◽  
Vol 28 (01) ◽  
pp. 91-110
Author(s):  
PRABIR CHAKRABORTY ◽  
UTTAM GHOSH ◽  
SUSMITA SARKAR

In this paper, we have considered a discrete prey–predator model with square-root functional response and optimal harvesting policy. This type of functional response is used to study the dynamics of the prey–predator model where the prey population exhibits herd behavior, i.e., the interaction between prey and predator occurs along the boundary of the population. The considered population model has three fixed points; one is trivial, the second one is axial and the last one is an interior fixed point. The first two fixed points are always feasible but the last one depends on the parameter value. The interior fixed point experiences the flip and Neimark–Sacker bifurcations depending on the predator harvesting coefficient. Finally, an optimal harvesting policy has been introduced and the optimal value of the harvesting coefficient is determined.


2013 ◽  
Vol 10 (4) ◽  
pp. 20120879-20120879 ◽  
Author(s):  
Dong Wang ◽  
Pengju Ren ◽  
Leibo Liu
Keyword(s):  

Author(s):  
Anton Dianov ◽  
Aleksey Anuchin

<span lang="EN-US">Square root calculation is a widely used task in real-time control systems especially in those, which control power electronics: motors drives, power converters, power factor correctors, etc. At the same time calculation of square roots is a bottle-neck in the optimization of code execution time. Taking into account that for many applications approximate calculation of a square root is enough, calculation time can be decreased with the price of precision of calculation. This paper analyses existing methods for fast square root calculation, which can be implemented for fixed point microcontrollers. It discusses algorithms’ pros and cons, analyses calculation errors and gives some recommendations on their use. The paper also proposes an original method for fast square root calculation, which does not use hardware acceleration and therefore, is suitable for implementation at a variety of modern Digital Signal Processors, which have high-speed hardware multipliers, but do not have effective dividers. The maximum relative error of the proposed method is 3.36% for calculation without division, and can be decreased to 0.055% using one division operation. Finally, the most promising methods are compared and results of their performance comparisons are depicted in tables. </span>


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