Improved Model Predictive Current Control for Three-phase Three-level Converters with Neutral-Point Voltage Ripple and Common Mode Voltage Reduction

Author(s):  
Yang Yong ◽  
Rong Chen ◽  
Mingdi Fan ◽  
Yang Xiao ◽  
Xinan Zhang ◽  
...  
2017 ◽  
Vol 27 (02) ◽  
pp. 1850028 ◽  
Author(s):  
Eedara Aswani Kumar ◽  
Koritala Chandra Sekhar ◽  
Rayapudi Srinivasa Rao

This paper presents a reduced control set model predictive control (RCSMPC) method for three-phase T-type neutral-point-clamped (NPC) inverter. The whole control set (WCS) consists of all the 27 switching states of T-type NPC inverter. The reduced control set (RCS) with 19 switching states is formed from WCS by excluding the switching states with common mode voltage (CMV) value higher than one-sixth of input DC voltage [Formula: see text]. With RCS, single-objective model predictive current control method can restrict the CMV peak value to [Formula: see text]. To further reduce the CMV below this threshold, a cost function with the weighted sum of two control targets is formulated in the RCSMPC method. The two control targets of RCSMPC method are CMV mitigation and load current control. The weight for CMV is called bias factor. The RCSMPC method is computationally efficient, as the number of switching states is less than that of WCSMPC. To further reduce the computational burden, CMV values corresponding to all the switching states are calculated offline and stored in memory. Robustness of both the methods is investigated with parameter deviations at different bias factors and reference currents. The proposed method is validated using simulation and experimental results and compared with the existing methods.


Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 779 ◽  
Author(s):  
Ming Wu ◽  
Zhenhao Song ◽  
Zhipeng Lv ◽  
Kai Zhou ◽  
Qi Cui

To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.


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