High-performance differential capacitive mems sensor readout with relaxation oscillator front-end and phase locked loop time-to-digital converter back-end

2016 IEEE Region 10 Conference (TENCON) ◽

10.1109/tencon.2016.7848271 ◽

2016 ◽

Author(s):

Kevin T. C. Chai ◽

Chao Wang ◽

Jifang Tao ◽

Jinghui Xu ◽

Liang Zhong ◽

...

Keyword(s):

High Performance ◽

Relaxation Oscillator ◽

Phase Locked Loop ◽

Digital Converter ◽

Time To Digital Converter ◽

Mems Sensor ◽

Front End ◽

Capacitive Mems

Download Full-text

A low power time-of-arrival ranging front end based on a 8-channel 2.2mW, 53ps single-shot-precision Time-to-Digital converter

IEEE Asian Solid-State Circuits Conference 2011 ◽

10.1109/asscc.2011.6123578 ◽

2011 ◽

Author(s):

Tom Redant ◽

Frederic Stubbe ◽

Wim Dehaene

Keyword(s):

Low Power ◽

Time Of Arrival ◽

Single Shot ◽

Digital Converter ◽

Time To Digital Converter ◽

Front End ◽

Download Full-text

Fully FPGA-based 3D (X,Y,t) imaging system with Cross Delay-Lines detectors and Eight-Channels High-Performance Time-to-Digital Converter

2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC) ◽

10.1109/nss/mic42677.2020.9508048 ◽

2020 ◽

Author(s):

F. Garzetti ◽

N. Lusardi ◽

N. Corna ◽

S. Salgaro ◽

N. Busola ◽

...

Keyword(s):

High Performance ◽

Imaging System ◽

Delay Lines ◽

Digital Converter ◽

Time To Digital Converter ◽

Performance Time

Download Full-text

A Novel Time-to-Digital Converter Based on Low-Jitter Phase-Locked Loop

IETE Journal of Research ◽

10.1080/03772063.2016.1274241 ◽

2017 ◽

Vol 63 (3) ◽

pp. 336-345

Author(s):

Jin Wu ◽

Chao Wang ◽

Shu-fang Shi ◽

Xiang-rong Yu ◽

Li-xia Zheng ◽

...

Keyword(s):

Phase Locked Loop ◽

Digital Converter ◽

Time To Digital Converter ◽

Download Full-text

Plug-and-Play Tunable and High-Performance Time-to-Digital Converter as IP-Core for Xilinx FPGAs

2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC) ◽

10.1109/nss/mic42677.2020.9508003 ◽

2020 ◽

Author(s):

N. Lusardi ◽

F. Garzetti ◽

N. Corna ◽

S. Salgaro ◽

N. Bachetti ◽

...

Keyword(s):

High Performance ◽

Digital Converter ◽

Ip Core ◽

Plug And Play ◽

Time To Digital Converter ◽

Performance Time

Download Full-text

10 ps resolution, 160 ns full scale range and less than 1.5% differential non-linearity time-to-digital converter module for high performance timing measurements

Review of Scientific Instruments ◽

10.1063/1.4733705 ◽

2012 ◽

Vol 83 (7) ◽

pp. 074703 ◽

Author(s):

B. Markovic ◽

D. Tamborini ◽

F. Villa ◽

S. Tisa ◽

A. Tosi ◽

...

Keyword(s):

High Performance ◽

Digital Converter ◽

Time To Digital Converter ◽

Scale Range ◽

Performance Timing

Download Full-text

A 0.65--1.35 GHz synthesizable all-digital phase locked loop with quantization noise suppressing time-to-digital converter

TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES ◽

10.3906/elk-1601-185 ◽

2017 ◽

Vol 25 ◽

pp. 2410-2423

Author(s):

Yalçın BALCIOĞLU ◽

Günhan DÜNDAR

Keyword(s):

Phase Locked Loop ◽

Quantization Noise ◽

Digital Converter ◽

Time To Digital Converter ◽

Download Full-text

Energy Efficient All-Digital Phase Locked Loop Architecture Design on High Resolution Fast Clocking Time to Digital Converter (TDC) Using Model Prescient Control (MPC) Technique

Wireless Personal Communications ◽

10.1007/s11277-018-5371-8 ◽

2018 ◽

Vol 102 (4) ◽

pp. 3343-3359 ◽

Author(s):

T. M. Sathish Kumar ◽

P. S. Periasamy

Keyword(s):

High Resolution ◽

Energy Efficient ◽

Phase Locked Loop ◽

Architecture Design ◽

Digital Converter ◽

Time To Digital Converter ◽

Download Full-text

Experimental results from a pixel front-end for the NA62 experiment with on pixel constant fraction discriminator and 100 ps Time to Digital Converter

IEEE Nuclear Science Symposuim & Medical Imaging Conference ◽

10.1109/nssmic.2010.5873789 ◽

2010 ◽

Author(s):

A Rivetti ◽

A Ceccucci ◽

A C Ramusino ◽

S Chiozzi ◽

G Dellacasa ◽

...

Keyword(s):

Experimental Results ◽

Digital Converter ◽

Time To Digital Converter ◽

Front End ◽

Constant Fraction Discriminator

Download Full-text

A pixel front-end ASIC in 0.13 μm CMOS for the NA62 experiment with on pixel 100 ps Time-to-Digital Converter

2009 IEEE Nuclear Science Symposium Conference Record (NSS/MIC) ◽

10.1109/nssmic.2009.5401882 ◽

2009 ◽

Author(s):

S. Martoiu ◽

A. Rivetti ◽

A. Ceccucci ◽

A.C. Ramusino ◽

S. Chiozzi ◽

...

Keyword(s):

Digital Converter ◽

Time To Digital Converter ◽

Download Full-text

A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop

13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems ◽

10.1109/ddecs.2010.5491766 ◽

2010 ◽

Author(s):

Kuo-Hsing Cheng ◽

Chang-Chien Hu ◽

Jen-Chieh Liu ◽

Hong-Yi Huang

Keyword(s):

Phase Locked Loop ◽

Digital Converter ◽

Time To Digital Converter ◽

Digital Phase ◽

Phase Sampling ◽

Time Amplifier ◽

Download Full-text