A Cellular Automata Guided Finite-State-Machine Watermarking Strategy for IP Protection of Sequential Circuits

2020 ◽  
pp. 1-1
Author(s):  
Rajit Karmakar ◽  
Suman Sekhar Jana ◽  
Santanu Chattopadhyay
Keyword(s):  
Cellular Automata ◽  
Finite State Machine ◽  
State Machine ◽  
Sequential Circuits ◽  
Ip Protection ◽  
Finite State ◽  
Finite State Machine Watermarking

A cellular automata guided two level obfuscation of Finite-State-Machine for IP protection

Integration ◽  
2020 ◽  
Vol 74 ◽  
pp. 93-106
Author(s):  
Rajit Karmakar ◽  
Suman Sekhar Jana ◽  
Santanu Chattopadhyay
Keyword(s):  
Cellular Automata ◽  
Finite State Machine ◽  
State Machine ◽  
Ip Protection ◽  
Finite State

Sequential Circuit Equivalence Checking Method Based on Minimizing Automation

2011 ◽  
Vol 204-210 ◽  
pp. 251-254
Author(s):  
Yu Wan Gu ◽  
Guo Dong Shi ◽  
Shi Yan Xie ◽  
Yu Qiang Sun
Keyword(s):  
Finite State Machine ◽  
State Machine ◽  
Sequential Circuits ◽  
Equivalence Checking ◽  
Sequential Circuit ◽  
Minimization Method ◽  
Finite State ◽  
Graph Form

A parallel checking method is proposed in the paper, in order to improve the speed of sequential circuit checking. The graph form of sequential circuits is isomorphic to finite state machine; a parallel sequential circuit equivalence checking method is designed using parallel minimization method of finite state machine. At last, the effectiveness and feasibility of the method is proved with an instance.

scholarly journals A Hardware Efficient Watermarking Technique based on LFSR

2019 ◽  
Vol 8 (3) ◽  
pp. 3264-3268
Keyword(s):  
Intellectual Property ◽  
Finite State Machine ◽  
Research Area ◽  
State Machine ◽  
Shift Register ◽  
Linear Feedback ◽  
Ip Protection ◽  
Is Research ◽  
Finite State ◽  
Feedback Shift Register

Watermarking has been used for many years to protect data in the form of images, text etc. With the increasing use of semiconductor Intellectual Property(IPs) by industries to develop various products, this concept of watermarking has been applied by semiconductor industries as well to protect the VLSI designs which use these semiconductor IPs. There are many watermarking techniques for IP protection of VLSI designs, out of which watermarking of Finite State Machine(FSM) based design is research area. Watermarking technique implemented in this paper uses a Linear Feedback Shift Register (LFSR) to watermark a FSM based design. The LFSR based watermarking is applied successfully on a sequence detector and is compared with other FSM watermarking techniques. The simulation and synthesis of LFSR based watermarking is performed using ModelSim and Xilinx ISE tool respectively. Results show improvement in Hardware utilization as compared to other FSM watermarking techniques available in literature.

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