A New Approach to the Development of Additive Fibonacci Generators Based on Prime Numbers

Pseudorandom number and bit sequence generators are widely used in cybersecurity, measurement, and other technology fields. A special place among such generators is occupied by additive Fibonacci generators (AFG). By itself, such a generator is not cryptographically strong. Nevertheless, when used as a primary it can be quite resistant to cryptanalysis generators. This paper proposes a modification to AGF, the essence of which is to use prime numbers as modules of recurrent equations describing the operation of generators. This modification made it possible to ensure the constancy of the repetition period of the output pseudorandom pulse sequence in the entire range of possible values of the initial settings–keys (seed) at specific values of the module. In addition, it has proposed a new generator scheme, which consists of two generators: the first of which is based on a modified AFG and the second is based on a linear feedback shift register (LFSR). The output pulses of both generators are combined through a logic element XOR. The results of the experiment show that the specific values of modules provide a constant repetition period of the output pseudorandom pulse sequence in a whole range of possible values of the initial settings–keys (seed) and provide all the requirements of the NIST test to statistical characteristics of the sequence. Modified AFGs are designed primarily for hardware implementation, which allows them to provide high performance.

Simultaneous Audio Encryption and Compression Using Parallel Compressive Sensing and Modified Toeplitz Measurement Matrix

With the explosive growth of voice information interaction, there is an urgent need for safe and effective compression transmission methods. In this paper, compressive sensing is used to realize the compression and encryption of speech signals. Firstly, the scheme of linear feedback shift register combined with inner product to generate measurement matrix is proposed. Secondly, we adopt a new parallel compressive sensing technique to tremendously improve the processing efficiency. Further, the two parties in the communication adopt public key cryptosystem to safely share the key and select a different measurement matrix for each frame of the voice signal to ensure the security. This scheme greatly reduces the difficulty of generating measurement matrix in hardware and improves the processing efficiency. Compared with the existing scheme by Moreno-Alvarado et al., our scheme has reduced the execution time by approximately 8%, and the mean square error (MSE) has also been reduced by approximately 5%.

Finding Non-liner Register on Binary M-Sequence Generating Binary Multiplication Sequence

In the current time there is an important problem that is for a received linear or nonlinear binary sequence {zn} how we can find the nonlinear feedback shift register and its linear equivalent which generate this sequence. The linear orthogonal sequences, special M-Sequences, play a big role in these methods for solving this problem. In the current research trying give illuminations about the methods which are very useful for solving this problem under short sequences, and study these methods for finding the nonlinear feedback shift register of a multiplication sequence and its linear equivalent feedback shift register of a received multiplication binary sequence{zn} where the multiplication on h degrees of a binary linear sequence {an}, or finding the equivalent linear feedback shift register of {zn}, where the sequence {zn}of the form M-sequence, and these methods are very effectively. We can extend these methods for the large sequences using programming and modern computers with large memory.

Linear Feedback Shift Register and its Applications in Digital System Design

In digital system design, the Linear Feedback Shift Register (LFSR) is the queen of logic functions, and the design engineers can use LFSR in both hardware (HW) or software (SW) implementation. In this paper, LFSR will be discussed in its HW implementation via Hardware description language. In addition, the application of LFSR in of pseudorandom number generator (PRNG), direct sequence spread spectrum (DSSS), cyclic redundancy check (CRC) is also given. Keywords-- Digital system design, System on chip, ASIC digital design, Linear feedback shift register

Design of Linear Feedback Shift Register for Low Power Applications

This paper presents the design & implementation of the Linear Feedback Shift Register (LFSR) using the Mentor Graphics tool in 90nm technology. LFSR’s have a wide variety of applications. They are used in pseudo-random variety generation, whitening sequences and pseudo-noise sequences. MOS current-mode logic (MCML) and Dynamic current-mode logic (DYCML) are employed to design an LFSR. MCML is widely used in high-speed applications and these MCML circuits are based on current steering logic. The advantages of the MCML method are that they have high noise immunity due to their differential nature of inputs. The disadvantage of MCML approach is static power dissipation. To overcome these issues of MCML logic, Dynamic CML logic is used. Its advantages include low static power dissipation and high performance. This paper shows the comparison results of CMOS, Dynamic CML and MCML designs in terms of delay, power and transistor count.