Three-Dimensional Space-Vector Modulation to Reduce Common-Mode Voltage for Multilevel Inverter

2010 ◽  
Vol 57 (7) ◽  
pp. 2324-2331 ◽  
Author(s):  
Mohan M Renge ◽  
Hiralal M Suryawanshi
2020 ◽  
Vol 29 (14) ◽  
pp. 2050229 ◽  
Author(s):  
Palanisamy Ramasamy ◽  
Vijayakumar Krishnasamy

In this paper, a three-dimensional Space Vector Modulation (3D SVM) is implemented for minimization of Common-Mode Voltage (CMV) of five-level Neutral Point Clamped (NPC) inverter. The 3D SVM control includes all merits of 2D SVM and provides better control compared to other PWM strategies. The switching state vectors are selected based on the nearest vector Switching State Vector (NSV); it selects the switching vectors which are having the minimum CMV level. It leads to minimization of the bearing voltage and protection of the drive from the damage; also this system reduces the total harmonic distortion. The switching time is calculated by reference vector identification with large and small subcubes tracking and prisms tracking in 3D cubic region. The CMV level with 3D SVM scheme is compared with other PWM methods. The simulation and hardware results are verified using Matlab Simulink and FPGA processor.


2018 ◽  
Vol 27 (14) ◽  
pp. 1850232 ◽  
Author(s):  
Palanisamy Ramasamy ◽  
Vijayakumar Krishnasamy ◽  
Mohamed Ali Jagabar Sathik ◽  
Ziad M. Ali ◽  
Shady H. E. Abdel Aleem

Capacitor imbalance is one of the major drawbacks of a neutral-point clamped multilevel inverter (NPC-MLI). The capacitor imbalance rises due to the nonuniform switching, nonideal DC link capacitors, improper commutation, and various asymmetrical phase currents in switching states. The imbalance can be minimized by using proper switching using a redundancy switching method and avoiding the usage of medium vectors. The computational cost of this system is to be decided by the level of the inverter system. This paper presents a comprehensive three-dimensional space vector modulation (3D-SVM) strategy to eliminate the imbalance in the DC link capacitor voltage, which is across the applied input DC source. The technique is easy to implement without using any trigonometric functions, lookup tables, or angle determinations. This proposed scheme has been verified using MATLAB Simulink and authenticated using field-programmable gate array (FPGA) controller.


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