DC Fault Current Blocking With the Coordination of Half-Bridge MMC and the Hybrid DC Breaker

2020 ◽  
Vol 67 (7) ◽  
pp. 5503-5514 ◽  
Author(s):  
Hossein Iman-Eini ◽  
Marco Liserre
2021 ◽  
Author(s):  
Mekhla Sen ◽  
Madhu Singh ◽  
Pragati Thakur ◽  
Astha Vikram ◽  
Anjali Bhardwaj ◽  
...  

2006 ◽  
Vol 442 (2) ◽  
pp. 108-112 ◽  
Author(s):  
Jing Shi ◽  
Yuejin Tang ◽  
Chen Wang ◽  
Yusheng Zhou ◽  
Jingdong Li ◽  
...  

2020 ◽  
Vol 13 (18) ◽  
pp. 4168-4175
Author(s):  
David Döring ◽  
Klaus Würflinger ◽  
Volker Staudt ◽  
Marcus Zeller ◽  
Günter Ebner

2019 ◽  
Vol 11 (16) ◽  
pp. 4493 ◽  
Author(s):  
Fazel Mohammadi ◽  
Gholam-Abbas Nazri ◽  
Mehrdad Saif

One of the major challenges toward the reliable and safe operation of the Multi-Terminal HVDC (MT-HVDC) grids arises from the need for a very fast DC-side protection system to detect, identify, and interrupt the DC faults. Utilizing DC Circuit Breakers (CBs) to isolate the faulty line and using a converter topology to interrupt the DC fault current are the two practical ways to clear the DC fault without causing a large loss of power infeed. This paper presents a new topology of a fast proactive Hybrid DC Circuit Breaker (HDCCB) to isolate the DC faults in MT-HVDC grids in case of fault current interruption, along with lowering the conduction losses and lowering the interruption time. The proposed topology is based on the inverse current injection technique using a diode and a capacitor to enforce the fault current to zero. Also, in case of bidirectional fault current interruption, the diode and capacitor prevent changing their polarities after identifying the direction of fault current, and this can be used to reduce the interruption time accordingly. Different modes of operation of the proposed topology are presented in detail and tested in a simulation-based system. Compared to the conventional DC CB, the proposed topology has increased the breaking current capability, and reduced the interruption time, as well as lowering the on-state switching power losses. To check and verify the performance and efficiency of the proposed topology, a DC-link representing a DC-pole of an MT-HVDC system is simulated and analyzed in the PSCAD/EMTDC environment. The simulation results verify the robustness and effectiveness of the proposed HDCCB in improving the overall performance of MT-HVDC systems and increasing the reliability of the DC grids.


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