BC412 bar code for silicon wafers

In this work As doped polysilicon was deposited onto (100) silicon wafers by APCVD at 660°C from a silane-arsine mixture, followed by a ten minute anneal at 1000°C, and in one case a further ten minute anneal at 700°C. Specimens for TEM and STEM analysis were prepared by chemical polishing. The microstructure, which is unchanged by the final 700°C anneal,is shown in Figure 1. It consists of numerous randomly oriented grains many of which contain twins.X-ray analysis was carried out in a VG HB5 STEM. As K α x-ray counts were collected from STEM scans across grain and twin boundaries, Figures 2-4. The incident beam size was about 1.5nm in diameter, and each of the 20 channels in the plots was sampled from a 1.6nm length of the approximately 30nm line scan across the boundary. The bright field image profile along the scanned line was monitored during the analysis to allow correlation between the image and the x-ray signal.

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Preparation of integrated circuits for TEM electromigration in situ studies

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100145753 ◽

1986 ◽

Vol 44 ◽

pp. 882-883

Author(s):

J. V. Maskowitz ◽

W. E. Rhoden ◽

D. R. Kitchen ◽

R. E. Omlor ◽

P. F. Lloyd

Keyword(s):

Integrated Circuits ◽

Crystallographic Orientation ◽

Silicon Wafers ◽

Minimum Size ◽

Test Vehicle ◽

In Situ Studies ◽

Boron Doped ◽

Doped Silicon ◽

Drill Holes

The fabrication of the aluminum bridge test vehicle for use in the crystallographic studies of electromigration involves several photolithographic processes, some common, while others quite unique. It is most important to start with a clean wafer of known orientation. The wafers used are 7 mil thick boron doped silicon. The diameter of the wafer is 1.5 inches with a resistivity of 10-20 ohm-cm. The crystallographic orientation is (111).Initial attempts were made to both drill and laser holes in the silicon wafers then back fill with photoresist or mounting wax. A diamond tipped dentist burr was used to successfully drill holes in the wafer. This proved unacceptable in that the perimeter of the hole was cracked and chipped. Additionally, the minimum size hole realizable was > 300 μm. The drilled holes could not be arrayed on the wafer to any extent because the wafer would not stand up to the stress of multiple drilling.

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