In Situ LID and Regeneration of PERC Solar Cells from Different Positions of a B-Doped Cz-Si Ingot

In order to investigate the light-induced-degradation (LID) and regeneration of industrial PERC solar cells made from different positions of silicon wafers in a silicon ingot, five groups of silicon wafers were cut from a commercial solar-grade boron-doped Czochralski silicon (Cz-Si) ingot from top to bottom with a certain distance and made into PERC solar cells by using the standard industrial process after measuring lifetimes of minority carriers and concentrations of boron, oxygen, carbon, and transition metal impurities. Then, the changes of their I - V characteristic parameters (efficiency η , open-circuit voltage V oc , short-circuit current I sc , and fill factor FF ) with time were in situ measured by using a solar cell I - V tester during the 1st LID (45°C, 1 sun, 12 h), regeneration (100°C, 1 sun, 24 h), and 2nd LID (45°C, 1 sun, 12 h). The results show that the LID and regeneration of the PERC solar cells are caused by the transition of B-O defects playing a dominant role together with the dissociation of Fe-B pairs playing a secondary role. The decay of η during the 1st LID is caused by the degradation of V oc , I sc , and FF , while the increase of η during the regeneration is mainly contributed by V oc and FF , and the decay of η during the 2nd LID is mainly induced by the degradation of I sc . After regeneration, the decay rate of η reduces from 4.43%–5.56% (relative) during the 1st LID to 0.33%–1.75% (relative) during the 2nd LID.

Rapid Prototyping of Organ-on-a-Chip Devices Using Maskless Photolithography

Organ-on-a-chip (OoC) and microfluidic devices are conventionally produced using microfabrication procedures that require cleanrooms, silicon wafers, and photomasks. The prototyping stage often requires multiple iterations of design steps. A simplified prototyping process could therefore offer major advantages. Here, we describe a rapid and cleanroom-free microfabrication method using maskless photolithography. The approach utilizes a commercial digital micromirror device (DMD)-based setup using 375 nm UV light for backside exposure of an epoxy-based negative photoresist (SU-8) on glass coverslips. We show that microstructures of various geometries and dimensions, microgrooves, and microchannels of different heights can be fabricated. New SU-8 molds and soft lithography-based polydimethylsiloxane (PDMS) chips can thus be produced within hours. We further show that backside UV exposure and grayscale photolithography allow structures of different heights or structures with height gradients to be developed using a single-step fabrication process. Using this approach: (1) digital photomasks can be designed, projected, and quickly adjusted if needed; and (2) SU-8 molds can be fabricated without cleanroom availability, which in turn (3) reduces microfabrication time and costs and (4) expedites prototyping of new OoC devices.

Digital Control of Active Network Microstructures on Silicon Wafers

This chapter presents a promising digital control of active microstructures developed and tested on silicon chips by current division and thus independent Joule heating powers, especially for planar submillimeter two-dimensional (2-D) grid microstructures built on silicon wafers by surface microfabrication. Current division on such 2-D grid networks with 2 × 2, 3 × 3, and n × n loops was modeled and analyzed theoretically by employing Kirchhoff’s voltage law (KVL) and Kirchhoff’s current law (KCL), which demonstrated the feasibility of active control of the networks by Joule heating effect. Furthermore, in situ testing of a typical 2-D microstructure with 2 × 2 loops by different DC sources was carried out, and the thermomechanical deformation due to Joule heating was recorded. As a result, active control of the current division has been proven to be a reliable and efficient approach to achieving the digital actuation of 2-D microstructures on silicon chips. Digital control of such microstructural networks on silicon chips envisions great potential applications in active reconfigurable buses for microrobots and flexible electronics.

Synthesis and studying properties of the GNPs@FexOy structure

An article presents a study of the regularities of the formation of gold up to 8 nm thick, deposited by vacuum thermal deposition on silicon wafers with a natural oxide, its annealing and subsequent deposition of iron oxide by chemical vapor deposition. The stages were accompanied by SEM analysis of the sample surface, as well as fixation of the optical and FTIR spectra, I–V characteristics of the obtained structures.

Photovoltaic Response of Silicon Wafers Treated in the K2WO4-Na2WO4-WO3 Melt

Texturing silicon wafers is one way to increase the performance of solar cells. This work is the first to report on the surface modification of Si wafers by processing in polytungstate melts. Scanning electron microscopy, atomic force microscopy, X-ray diffraction analysis, the Brunauer–Emmett–Teller method, and photoelectrochemical measurements were used to elucidate the effect of texturing conditions in the Na2WO4 – K2WO4 (1:1) melt containing 35 or 50 mol% WO3 at 973 K in air. As a result of cathodic treatment in the melt containing 50 mol% WO3 at the potential of –0.92 V (vs. Pt) for 15 s, upright pyramids were formed on the Si surface. In addition, inverted pyramids appeared at the OTB/Si contact points. The photocurrent density of these samples was several times higher than that for the initial Si wafer or the Si wafer etched in 5M NaOH solution at 353 K for 20 min. Mechanisms for the formation of upright and inverted pyramids were proposed. Unusual eight-faceted pyramids were formed on the Si surface during cathodic treatment in the melt containing 35 mol% WO3 at –1.19 V for 15 s, but the photocurrent density of such samples was low.