Noise test method for dual-gate MOSFET device

In recent years, with the development of mesoscopic physics and nanoelectronics, the research on noise and testing technology of electronic components has been developed. It is well known that noise can characterize the transmission characteristics of carriers in nanoscale electronic components. With the continuous shrinking of the device size, the carrier transport of nanoscale MOSFET devices has been gradually transformed from the traditional drift-diffusion to become the quasi-ballistic or ballistic transport, and its current noise contains granular and thermal noise. The paper by Jeon et al. [The first observation of shot noise characteristics in 10-nm scale MOSFETs, in Proc. 2009 Symp. VLSI Technology (IEEE, Honolulu, 2009), pp. 48–49] presents the variation relation of 20 nm MOSFET current noise with source–drain current and voltage, and its current noise characteristic is between thermal noise and shot noise, so 20 nm MOSFET current noise is shot noise and thermal noise. The paper by Navid et al. [J. Appl. Phys. 101 (2007) 124501] shows through simulation that the 60 nm MOSFET current noise is suppressed shot noise and thermal noise. At present, the current noise has seriously affected the basic performance of the device, thus the circuit cannot work normally. Therefore, it is necessary to study the generation mechanism and characteristics of current noise in electronic components so as to suppress device noise, which can not only realize the reduction of device noise, but also play a positive role in the work-efficiency, life-span and reliability of electronic components.