Design of True Random Number Generator Using Fingerprint as an Entropy Source and Its Implementation in S-Box

Author(s):  
Dhirendra Kumar ◽  
Utkarsh Kumar Chaurasia ◽  
Shreyansh Mishra ◽  
Prafull Singh Patel ◽  
Prasanna Kumar Misra ◽  
...  

This paper deals with the design of a true random number generator (TRNG) using the fingerprint as an entropy source and its implementation in substitution box (S-box) of Advanced Encryption Standard (AES). Considering fingerprint as a unique and random arrangement of minutiae, these minutiae points are used as the source of entropy. The proposed design utilizes fewer resources minimizing hardware redundancy and enhancing the level of randomness. This TRNG has been designed and validated using Artix-7 FPGA. The data rate, speed and latency have been obtained as 40 Mbps, 5 Mbps and 305 ns, respectively. The generated random bit stream had also been sampled and converted to a binary format in MATLAB and tested through the National Institute of Standards and Technology (NIST) 800.22 statistical suite for validation. The proposed TRNG design pass efficiency achieved is more than 95% for a sample size of 10 binary sequences.

Author(s):  
SELÇUK COŞKUN ◽  
İHSAN PEHLİVAN ◽  
AKİF AKGÜL ◽  
BİLAL GÜREVİN

The basis of encryption techniques is random number generators (RNGs). The application areas of cryptology are increasing in number due to continuously developing technology, so the need for RNGs is increasing rapidly, too. RNGs can be divided into two categories as pseudorandom number generator (PRNGs) and true random number generator (TRNGs). TRNGs are systems that use unpredictable and uncontrollable entropy sources and generate random numbers. During the design of TRNGs, while analog signals belonging to the used entropy sources are being converted to digital data, generally comparators, flip-flops, Schmitt triggers, and ADCs are used. In this study, a computer-controlled new and flexible platform to find the most appropriate system parameters in ADC-based TRNG designs is designed and realized. As a sample application with this new platform, six different TRNGs that use three different outputs of Zhongtang, which is a continuous time chaotic system, as an entropy source are designed. Random number series generated with the six designed TRNGs are put through the NIST800–22 test, which has the internationally highest standards, and they pass all tests. With the help of the new platform designed, ADC-based high-quality TRNGs can be developed fast and also without the need for expertise. The platform has been designed to decide which entropy source and parameter are better by comparing them before complex embedded TRNG designs. In addition, this platform can be used for educational purposes to explain how to work an ADC-based TRNG. That is why it can be utilized as an experiment set in engineering education, as well.


IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Ronaldo Serrano ◽  
Ckristian Duran ◽  
Trong-Thuc Hoang ◽  
Marco Sarmiento ◽  
Khai-Duy Nguyen ◽  
...  

Author(s):  
Sivaraman Rethinam ◽  
Sundararaman Rajagopalan ◽  
Sridevi Arumugham ◽  
Siva Janakiraman ◽  
C. Lakshmi ◽  
...  

2020 ◽  
Vol 14 (7) ◽  
pp. 1001-1011
Author(s):  
Dhirendra Kumar ◽  
Rahul Anand ◽  
Sajai Vir Singh ◽  
Prasanna Kumar Misra ◽  
Ashok Srivastava ◽  
...  

2021 ◽  
pp. 2100062
Author(s):  
Kyung Seok Woo ◽  
Jaehyun Kim ◽  
Janguk Han ◽  
Jin Myung Choi ◽  
Woohyun Kim ◽  
...  

2021 ◽  
Vol 11 (8) ◽  
pp. 3330
Author(s):  
Pietro Nannipieri ◽  
Stefano Di Matteo ◽  
Luca Baldanzi ◽  
Luca Crocetti ◽  
Jacopo Belli ◽  
...  

Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with analogue parameters of the circuit, True Random Number Generators are usually tailored on specific silicon technology and are not easily scalable on programmable hardware, without affecting their entropy. On the other hand, programmable hardware and programmable System on Chip are gaining large adoption rate, also in security critical application, where high quality random number generation is mandatory. The work presented herein describes the design and the validation of a digital True Random Number Generator for cryptographically secure applications on Field Programmable Gate Array. After a preliminary study of literature and standards specifying requirements for random number generation, the design flow is illustrated, from specifications definition to the synthesis phase. Several solutions have been studied to assess their performances on a Field Programmable Gate Array device, with the aim to select the highest performance architecture. The proposed designs have been tested and validated, employing official test suites released by NIST standardization body, assessing the independence from the place and route and the randomness degree of the generated output. An architecture derived from the Fibonacci-Galois Ring Oscillator has been selected and synthesized on Intel Stratix IV, supporting throughput up to 400 Mbps. The achieved entropy in the best configuration is greater than 0.995.


Sign in / Sign up

Export Citation Format

Share Document