Dislocation Reduction in GaAs on Si by Thermal Cycles and InGaAs/GaAs Strained-Layer Superlattices

1987 ◽  
Vol 26 (Part 2, No. 12) ◽  
pp. L1950-L1952 ◽  
Author(s):  
Hiroshi Okamoto ◽  
Yoshio Watanabe ◽  
Yoshiaki Kadota ◽  
Yoshiro Ohmachi
1992 ◽  
Vol 117 (1-4) ◽  
pp. 161-165 ◽  
Author(s):  
I. Sugiyama ◽  
A. Hobbs ◽  
T. Saito ◽  
O. Ueda ◽  
K. Shinohara ◽  
...  

1987 ◽  
Vol 91 ◽  
Author(s):  
Russ Fischer

SUMMARY ABSTRACTDespite the 4.2% lattice mismatch, several laboratories have demonstrated that the quality of GaAs grown on Si is high enough for practical device applications [1–5]. At the GaAs/Si interface, a dislocation density of roughly 1012cm−2 is required to accommodate the mismatch. Therefore various techniques of dislocation filtering are necessary to provide material with acceptable dislocation counts. Among these techniques are the use of tilted substrates, strained layer superlattices, and intermediate layers.


1987 ◽  
Vol 48 (C5) ◽  
pp. C5-321-C5-327 ◽  
Author(s):  
H. BRUGGER ◽  
G. ABSTREITER

2007 ◽  
Vol 91 (4) ◽  
pp. 043514 ◽  
Author(s):  
J. B. Rodriguez ◽  
E. Plis ◽  
G. Bishop ◽  
Y. D. Sharma ◽  
H. Kim ◽  
...  

1998 ◽  
Vol 184-185 ◽  
pp. 728-731 ◽  
Author(s):  
I.V. Bradley ◽  
J.P. Creasey ◽  
K.P. O'Donnell

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