A leakage-energy-reduction technique for highly-associative caches in embedded systems

Mapping Intimacies ◽

10.1145/1152923.1024302 ◽

2003 ◽

Author(s):

Akihito Sakanaka ◽

Seiichirou Fujii ◽

Toshinori Sato

Keyword(s):

Embedded Systems ◽

Reduction Technique ◽

Energy Reduction

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A leakage-energy-reduction technique for highly-associative caches in embedded systems

ACM SIGARCH Computer Architecture News ◽

10.1145/1024295.1024302 ◽

2004 ◽

Vol 32 (3) ◽

pp. 50-54 ◽

Author(s):

Akihito Sakanaka ◽

Seiichirou Fujii ◽

Toshinori Sato

Keyword(s):

Embedded Systems ◽

Reduction Technique ◽

Energy Reduction

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An energy reduction technique for multimedia application with tolerance to deadline misses

10.1109/dac.2003.1218868 ◽

2004 ◽

Author(s):

Shaoxiong Hua ◽

Gang Qu ◽

S.S. Bhattacharyya

Keyword(s):

Reduction Technique ◽

Energy Reduction ◽

Multimedia Application

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An architectural level energy reduction technique for deep-submicron cache memories

Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design ◽

10.1109/aspdac.2002.994935 ◽

2003 ◽

Author(s):

T. Ishihara ◽

K. Asada

Keyword(s):

Deep Submicron ◽

Reduction Technique ◽

Energy Reduction ◽

Level Energy ◽

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A. static and dynamic energy reduction technique for I-cache and BTB in embedded processors

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) ◽

10.1109/aspdac.2004.1337709 ◽

2005 ◽

Author(s):

H. Sato ◽

T. Sato

Keyword(s):

Reduction Technique ◽

Energy Reduction ◽

Embedded Processors

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A kinetic energy reduction technique and characterizations of the ground states of spin-1 Bose-Einstein condensates

Discrete & Continuous Dynamical Systems - B ◽

10.3934/dcdsb.2014.19.1119 ◽

2014 ◽

Vol 19 (4) ◽

pp. 1119-1128 ◽

Author(s):

Liren Lin ◽

◽

I-Liang Chern ◽

Keyword(s):

Kinetic Energy ◽

Ground States ◽

Reduction Technique ◽

Energy Reduction ◽

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A computation and energy reduction technique for H.264 Deblocking Filter hardware

2011 IEEE 19th Signal Processing and Communications Applications Conference (SIU) ◽

10.1109/siu.2011.5929624 ◽

2011 ◽

Author(s):

Yusuf Adibelli ◽

Mustafa Parlak ◽

Ilker Hamzaoglu

Keyword(s):

Reduction Technique ◽

Energy Reduction ◽

Deblocking Filter

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Integrated sidelobe energy reduction technique using optimal polyphase codes

Electronics Letters ◽

10.1049/el:19991451 ◽

1999 ◽

Vol 35 (24) ◽

pp. 2090 ◽

Author(s):

W.K. Lee ◽

H.D. Griffiths ◽

R. Benjamin

Keyword(s):

Reduction Technique ◽

Energy Reduction

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A computation and energy reduction technique for HEVC intra mode decision

IEEE Transactions on Consumer Electronics ◽

10.1109/tce.2014.7027351 ◽

2014 ◽

Vol 60 (4) ◽

pp. 745-753 ◽

Author(s):

Erdem Ozcan ◽

Ercan Kalali ◽

Yusuf Adibelli ◽

Ilker Hamzaoglu

Keyword(s):

Reduction Technique ◽

Mode Decision ◽

Energy Reduction ◽

Intra Mode Decision

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Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems

IEEE Transactions on Computers ◽

10.1109/tc.2011.229 ◽

2013 ◽

Vol 62 (2) ◽

pp. 268-278 ◽

Author(s):

Ozcan Ozturk ◽

Mahmut Kandemir ◽

Guangyu Chen

Keyword(s):

Embedded Systems ◽

Voltage Scaling ◽

Dynamic Voltage Scaling ◽

Energy Reduction ◽

Dynamic Voltage ◽

Directed Energy ◽

Voltage Islands

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A novel energy reduction technique for H.264 intra mode decision

2011 18th IEEE International Conference on Image Processing ◽

10.1109/icip.2011.6116530 ◽

2011 ◽

Author(s):

Yusuf Adibelli ◽

Mustafa Parlak ◽

Ilker Hamzaoglu

Keyword(s):

Reduction Technique ◽

Mode Decision ◽

Energy Reduction ◽

Intra Mode Decision

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