PAC: Paged Adaptive Coalescer for 3D-Stacked Memory

Proceedings of the 29th International Symposium on High-Performance Parallel and Distributed Computing ◽

10.1145/3369583.3392670 ◽

2020 ◽

Author(s):

Xi Wang ◽

John D. Leidel ◽

Brody Williams ◽

Yong Chen

Keyword(s):

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Low-Power Motion Estimation Processor with 3D Stacked Memory

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e98.a.1431 ◽

2015 ◽

Vol E98.A (7) ◽

pp. 1431-1441 ◽

Author(s):

Shuping ZHANG ◽

Jinjia ZHOU ◽

Dajiang ZHOU ◽

Shinji KIMURA ◽

Satoshi GOTO

Keyword(s):

Motion Estimation ◽

Low Power ◽

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Processing thick multilevel polyimide films for 3-D stacked memory

IEEE Transactions on Advanced Packaging ◽

10.1109/6040.763191 ◽

1999 ◽

Vol 22 (2) ◽

pp. 189-199 ◽

Author(s):

M.D. Caterer ◽

T.H. Daubenspeck ◽

T.G. Ference ◽

S.J. Holmes ◽

R.M. Quinn

Keyword(s):

Polyimide Films ◽

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Millipede: Die-Stacked Memory Optimizations for Big Data Machine Learning Analytics

2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS) ◽

10.1109/ipdps.2018.00026 ◽

2018 ◽

Author(s):

. Nitin ◽

Mithuna Thottethodi ◽

T. N. Vijaykumar

Keyword(s):

Machine Learning ◽

Big Data ◽

Learning Analytics ◽

Memory Optimizations ◽

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An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth

HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture ◽

10.1109/hpca.2010.5416628 ◽

2010 ◽

Author(s):

Dong Hyuk Woo ◽

Nak Hee Seong ◽

Dean L. Lewis ◽

Hsien-Hsin S. Lee

Keyword(s):

High Density ◽

Memory Architecture ◽

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Cooperative cache memory (CCM) based on the performance efficiency for 3D stacked memory system

IEICE Electronics Express ◽

10.1587/elex.13.20160276 ◽

2016 ◽

Vol 13 (12) ◽

pp. 20160276-20160276

Author(s):

Hongyeol Lim ◽

Gi-Ho Park

Keyword(s):

Memory System ◽

Cache Memory ◽

Cooperative Cache ◽

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High-performance RF-interconnect for 3D stacked memory

2017 International SoC Design Conference (ISOCC) ◽

10.1109/isocc.2017.8368793 ◽

2017 ◽

Author(s):

Ahmed Alzahmi ◽

Nahid Mirzaie ◽

Chung-Ching Lin ◽

Insoo Kim ◽

Gyung-Su Byun

Keyword(s):

High Performance ◽

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Reliability challenges of through-silicon-via (TSV) stacked memory chips for 3-D integration: From transistors to packages

2013 IEEE International Interconnect Technology Conference - IITC ◽

10.1109/iitc.2013.6615583 ◽

2013 ◽

Author(s):

Ho-Young Son ◽

Woong-Sun Lee ◽

Seung-Kwon Noh ◽

Min-Suk Suh ◽

Jae-Sung Oh ◽

...

Keyword(s):

Through Silicon Via ◽

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Thermal Effect Investigation of Chip-to-Wafer Hybrid Bonding on 3D-Stacked Memory

10.1109/eptc53413.2021.9663907 ◽

2021 ◽

Author(s):

Yong Han ◽

Masaya Kawano

Keyword(s):

Thermal Effect ◽

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IMCI: an efficient fingerprint retrieval approach based on 3D stacked memory

Science China Information Sciences ◽

10.1007/s11432-019-2672-5 ◽

2020 ◽

Vol 63 (7) ◽

Author(s):

Wen Cheng ◽

Ran Cai ◽

Lingfang Zeng ◽

Dan Feng ◽

André Brinkmann ◽

...

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A low power 720p motion estimation processor with 3D stacked memory

2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2014.7004163 ◽

2014 ◽

Author(s):

Shuping Zhang ◽

Jinjia Zhou ◽

Dajiang Zhou ◽

Satoshi Goto

Keyword(s):

Motion Estimation ◽

Low Power ◽

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