scholarly journals CGRA-EAM—Rapid Energy and Area Estimation for Coarse-grained Reconfigurable Architectures

2021 ◽  
Vol 14 (4) ◽  
pp. 1-28
Author(s):  
Mark Wijtvliet ◽  
Henk Corporaal ◽  
Akash Kumar
Keyword(s):  
Design Space Exploration ◽  
Design Space ◽  
High Energy ◽  
Coarse Grained ◽  
Reconfigurable Architectures ◽  
Percentage Error ◽  
Area Estimation ◽  
Iterative Design ◽  
The Mean ◽  
Performance Area

Reconfigurable architectures are quickly gaining in popularity due to their flexibility and ability to provide high energy efficiency. However, reconfigurable systems allow for a huge design space. Iterative design space exploration (DSE) is often required to achieve good Pareto points with respect to some combination of performance, area, and/or energy. DSE tools depend on information about hardware characteristics in these aspects. These characteristics can be obtained from hardware synthesis and net-list simulation, but this is very time-consuming. Therefore, architecture models are common. This work introduces CGRA-EAM (Coarse-Grained Reconfigurable Architecture - Energy & Area Model), a model for energy and area estimation framework for coarse-grained reconfigurable architectures. The model is evaluated for the Blocks CGRA. The results demonstrate that the mean absolute percentage error is 15.5% and 2.1% for energy and area, respectively, while the model achieves a speedup of close to three orders of magnitude compared to synthesis.

AC-DSE: Approximate Computing for the Design Space Exploration of Reconfigurable MPSoCs

2018 ◽  
Vol 27 (09) ◽  
pp. 1850145 ◽  
Author(s):  
Arsalan Shahid ◽  
Muhammad Yasir Qadri ◽  
Martin Fleury ◽  
Hira Waris ◽  
Ayaz Ahmad ◽  
...  
Keyword(s):  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Reconfigurable Architectures ◽  
Approximate Computing ◽  
Further Training ◽  
Throughput Performance ◽  
On Chip ◽  
Processor Cores ◽  
Typical Design

This paper concerns the design space exploration (DSE) of Reconfigurable Multi- Processor System-on- Chip (MPSoC) architectures. Reconfiguration allows users to allocate optimum system resources for a specific application in such a way to improve the energy and throughput balance. To achieve the best balance between power consumption and throughput performance for a particular application domain, typical design space parameters for a multi-processor architecture comprise the cache size, the number of processor cores and the operating frequency. The exploration of the design space has always been an offline technique, consuming a large amount of time. Hence, the exploration has been unsuitable for reconfigurable architectures, which require an early runtime decision. This paper presents Approximate Computing DSE (AC-DSE), an online technique for the DSE of MPSoCs by means of approximate computing. In AC-DSE, design space solutions are first obtained from a set of optimization algorithms, which in turn are used to train a neural network (NN). From then on, the NN can be used to rapidly return its own solutions in the form of design space parameters for a desired energy and throughput performance, without any further training.

scholarly journals Design space exploration for partially reconfigurable architectures in real-time systems

2013 ◽  
Vol 59 (8) ◽  
pp. 571-581 ◽  
Author(s):  
François Duhem ◽  
Fabrice Muller ◽  
Willy Aubry ◽  
Bertrand Le Gal ◽  
Daniel Négru ◽  
...  
Keyword(s):  
Real Time ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
Reconfigurable Architectures ◽  
Real Time Systems ◽  
Time Systems
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