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Weak Inversion for Ultimate Low- Power Logic
Computer Engineering Series - Low-Power Electronics Design
◽
10.1201/9781420039559.ch16
◽
2004
◽
pp. 16-1-16-18
◽
Cited By ~ 5
Author(s):
Eric Vittoz
Keyword(s):
Low Power
◽
Weak Inversion
◽
Low Power Logic
Download Full-text
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Weak Inversion for Ultimate Low-Power Logic
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Weak Inversion for Ultimate Low-Power Logic
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Selectively clocked skewed logic (SCSL): a robust low-power logic style for high-performance applications
ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581)
◽
10.1109/lpe.2001.945414
◽
2002
◽
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◽
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◽
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◽
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◽
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Opportunities and Challenges of Emerging Nanotechnologies for Future High-Speed and Low-Power Logic Applications
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◽
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◽
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◽
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Novel III-N heterostructure devices for low-power logic and more
2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)
◽
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High-Speed, Low-Power Logic ICs using Quasi-Normally-Off GaAs MESFETs
10.1109/esscirc.1980.5468776
◽
1980
◽
Author(s):
G. Nuzillat
◽
G. Bert
◽
F. Damay-Kavala
◽
C. Arnodo
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◽
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◽
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◽
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JFET serves as low-power logic translator
Electronic Circuits, Systems and Standards
◽
10.1016/b978-0-7506-0068-2.50037-7
◽
1991
◽
pp. 119
Author(s):
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◽
Low Power Logic
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