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Novel III-N heterostructure devices for low-power logic and more
2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)
◽
10.1109/nano.2016.7751336
◽
2016
◽
Cited By ~ 3
Author(s):
P. Fay
◽
W. Li
◽
L. Cao
◽
K. Pourang
◽
S. M. Islam
◽
...
Keyword(s):
Low Power
◽
Low Power Logic
◽
Heterostructure Devices
Download Full-text
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References
III-N heterostructure devices for low-power logic
2017 China Semiconductor Technology International Conference (CSTIC)
◽
10.1109/cstic.2017.7919743
◽
2017
◽
Cited By ~ 2
Author(s):
P. Fay
◽
W. Li
◽
D. Digiovanni
◽
L. Cao
◽
H. Ilatikhameneh
◽
...
Keyword(s):
Low Power
◽
Low Power Logic
◽
Heterostructure Devices
Download Full-text
Partition Based Product Term Retiming for Reliable Low Power Logic Structure
Advances in Intelligent Systems and Computing - Advances in Information and Communication Networks
◽
10.1007/978-3-030-03402-3_13
◽
2018
◽
pp. 178-189
Author(s):
S. Jalaja
◽
A. M. Vijaya Prakash
Keyword(s):
Low Power
◽
Product Term
◽
Low Power Logic
◽
Logic Structure
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Selectively clocked skewed logic (SCSL): a robust low-power logic style for high-performance applications
ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581)
◽
10.1109/lpe.2001.945414
◽
2002
◽
Cited By ~ 3
Author(s):
N. Sirisantana
◽
A. Cao
◽
S. Davidson
◽
Cheng-Kok Koh
◽
K. Roy
Keyword(s):
Low Power
◽
High Performance
◽
Low Power Logic
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Opportunities and Challenges of Emerging Nanotechnologies for Future High-Speed and Low-Power Logic Applications
2005 IEEE Conference on Electron Devices and Solid-State Circuits
◽
10.1109/edssc.2005.1635194
◽
2006
◽
Cited By ~ 2
Author(s):
R. Chau
Keyword(s):
Low Power
◽
High Speed
◽
Low Power Logic
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High-Speed, Low-Power Logic ICs using Quasi-Normally-Off GaAs MESFETs
10.1109/esscirc.1980.5468776
◽
1980
◽
Author(s):
G. Nuzillat
◽
G. Bert
◽
F. Damay-Kavala
◽
C. Arnodo
Keyword(s):
Low Power
◽
High Speed
◽
Low Power Logic
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Carrier Transport in High-Mobility III–V Quantum-Well Transistors and Performance Impact for High-Speed Low-Power Logic Applications
IEEE Electron Device Letters
◽
10.1109/led.2008.2002945
◽
2008
◽
Vol 29
(10)
◽
pp. 1094-1097
◽
Cited By ~ 58
Author(s):
G. Dewey
◽
M.K. Hudait
◽
Kangho Lee
◽
R. Pillarisetty
◽
W. Rachmady
◽
...
Keyword(s):
Quantum Well
◽
Low Power
◽
High Speed
◽
Carrier Transport
◽
High Mobility
◽
Performance Impact
◽
And Performance
◽
Low Power Logic
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JFET serves as low-power logic translator
Electronic Circuits, Systems and Standards
◽
10.1016/b978-0-7506-0068-2.50037-7
◽
1991
◽
pp. 119
Author(s):
Timothy R Wolf
Keyword(s):
Low Power
◽
Low Power Logic
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Adaptive Supply Voltage Management for Low Power Logic Circuitry Operating at Subthreshold
International Journal of VLSI Design & Communication Systems
◽
10.5121/vlsic.2015.6201
◽
2015
◽
Vol 6
(2)
◽
pp. 01-14
Author(s):
Rehan Ahmed
Keyword(s):
Low Power
◽
Supply Voltage
◽
Voltage Management
◽
Low Power Logic
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Design and Simulation of Low-Power Logic Gates Based on Nanoscale Side-Contacted FED
IEEE Transactions on Electron Devices
◽
10.1109/ted.2016.2626342
◽
2017
◽
Vol 64
(1)
◽
pp. 306-311
◽
Cited By ~ 7
Author(s):
Behnam Jafari Touchaei
◽
Negin Manavizadeh
Keyword(s):
Low Power
◽
Logic Gates
◽
Low Power Logic
Download Full-text
Adiabatic capacitive logic: A paradigm for low-power logic
2017 IEEE International Symposium on Circuits and Systems (ISCAS)
◽
10.1109/iscas.2017.8050996
◽
2017
◽
Cited By ~ 7
Author(s):
G. Pillonnet
◽
H. Fanet
◽
S. Houri
Keyword(s):
Low Power
◽
Low Power Logic
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