The silicon carbide (SiC) material is being spotlighted as a next-generation power semiconductor material due to the characteristic limitations of the existing silicon materials. SiC has a wider band gap, higher breakdown voltage, higher thermal conductivity, and higher saturation electron mobility than Si. However, actual SiC SBDs exhibit a lower dielectric breakdown voltage than the theoretical breakdown voltage that causes the electric field concentration, a phenomenon that occurs on the edge of the contact surface as in the conventional power semiconductor devices. In this paper, we designed an edge termination structure using a field plate structure through oxide etch angle control, and optimized the structure to obtain a high breakdown voltage. The experiment results indicated that oxide etch angle was 45° when the breakdown voltage characteristics of the SiC SBD were optimized and a breakdown voltage of 681V was obtained.
Polishing Technique of Next-Generation Power Semiconductor SiC Substrate