Modeling and Code Generation of Android Applications Using Acceleo

2016 ◽  
Vol 10 (3) ◽  
pp. 83-94 ◽  
Author(s):  
Hanane BENOUDA ◽  
Redouane ESSBAI ◽  
Mostafa AZIZI ◽  
Mimoun MOUSSAOUI
Keyword(s):  
Code Generation ◽  
Android Applications

scholarly journals Convalida: a Code Generation-based FieldValidation Library for Android Applications

2019 ◽  
Author(s):  
Wellington Pereira ◽  
Paulo Maia
Keyword(s):  
Comparative Study ◽  
Code Generation ◽  
Business Rules ◽  
Field Validation ◽  
Android Applications ◽  
Final Code ◽  
Validation Tool

A common, repetitive, and time-consuming task in the construction of Android applications is creating interface field validation. Although there are some tools that address that issue, they are not intuitive and require effort for configuration, which may hinder their use. This paper introduces Convalida, an annotation-based library that generates code automatically at compile time for field validation of Android applications, thus allowing the developer to focus on the implementation of business rules. A comparative study considering other field validation tool and a manual approach is also provided and shows that our library has improved the final code.

ECC-Based Bit-Write Reduction Code Generation for Non-Volatile Memory

2015 ◽  
Vol E98.A (12) ◽  
pp. 2494-2504 ◽  
Author(s):  
Masashi TAWADA ◽  
Shinji KIMURA ◽  
Masao YANAGISAWA ◽  
Nozomu TOGAWA
Keyword(s):  
Code Generation ◽  
Non Volatile Memory ◽  
Volatile Memory

Privacy Concern Code Generation Using Crypto Neural Scheme

2019 ◽  
Vol 7 (5) ◽  
pp. 824-828
Author(s):  
Anaswara Venunadh ◽  
Shruthi N ◽  
Mannar Mannan
Keyword(s):  
Code Generation ◽  
Privacy Concern

Realization of NAND FLASH Control Glueless Interface Circuit

2014 ◽  
Vol 1008-1009 ◽  
pp. 659-662
Author(s):  
Hai Ke Liu ◽  
Shun Wang ◽  
Xin Gna Kang ◽  
Jin Liang Wang
Keyword(s):  
Error Correction ◽  
Code Generation ◽  
Nand Flash ◽  
Timing Control ◽  
Interface Circuit ◽  
Advantages And Disadvantages ◽  
Operation Sequence ◽  
Control Interface

The article realization of NAND FLASH control glueless interface circuit based on FPGA,comparing the advantages and disadvantages of the NAND Flash and analysising the function of control interface circuit. The control interface circuit can correct carry out the SRAM timing-input block erase, page reads, page programming, state read instructions into the required operation sequence of NAND Flash, greatly simplifies the NAND FLASH read and write timing control. According to the ECC algorithm,the realization method of ECC check code generation,error search,error correction is described.The function of operate instructions of the NAND Flash control interface circuit designed in this paper is verified on Xillinx Spartan-3 board, and the frequency can reach 100MHz.

An experiment in table driven code generation

1982 ◽  
Vol 17 (6) ◽  
pp. 32-43 ◽  
Author(s):  
Susan L. Graham ◽  
Robert R. Henry ◽  
Robert A. Schulman
Keyword(s):  
Code Generation
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