Fundamental Study on High-Power-Density Multicellular Bufferless Power Electronic Transformer

2021 ◽  
Vol 141 (10) ◽  
pp. 803-811
Author(s):  
Yusuke Hayashi ◽  
Hongliang Su ◽  
Kazuto Takao
2015 ◽  
Vol 821-823 ◽  
pp. 797-800
Author(s):  
Shi Niu ◽  
Maxime Berthou ◽  
Dominique Tournier

In many power electronic inverters, the gate drive failure may put the switch normally-on in short-circuit (SC) risk. The high power density generated thus leads rapidly to the transistor failure. This paper presents our study via electro-thermal simulation of a 1200 V JFET under short circuit. It provides deep insight of physical phenomena present in the JFET during the short-circuit and will allow further improvements and understanding of it.


2021 ◽  
Author(s):  
Julian Weimer ◽  
Dominik Koch ◽  
Maximilian Nitzsche ◽  
Jorg Haarer ◽  
Ingmar Kallfass

Author(s):  
M. Mahesh ◽  
K. Vinoth Kumar ◽  
Mesfin Abebe ◽  
L. Udayakumar ◽  
M. Mathankumar

Electronics ◽  
2018 ◽  
Vol 7 (1) ◽  
pp. 9 ◽  
Author(s):  
Graziella Giglia ◽  
Guido Ala ◽  
Maria Di Piazza ◽  
Giuseppe Giaconia ◽  
Massimiliano Luna ◽  
...  

2011 ◽  
Vol 354-355 ◽  
pp. 1342-1346
Author(s):  
Jian Feng Jiang ◽  
Xi Jun Yang ◽  
Jian Guo Jiang ◽  
Huai Gang Lei

Power electronic transformer (PET) which has a big potential application value in smart grid is an electrical power transformer device adopting power electronic converter and high frequency switch transformer. A new PET with power factor correctors (PFC) is proposed in this paper. Due to high power level of PET, PFC should have a high power level as well. Therefore, the multi-phase interleaved PFC is employed. The paper describes the one cycle control principle, proposes a current synthesis method based on IGBT current, and then analyses the relationship between ripple current and duty cycle of IGBT. In addition, the whole PFC system is simulated completely by means of Matlab/Simulink. In order to verify the theoretical analysis and simulation analysis, a four-phase interleaved PFC with a rated output power of 8.0kW is designed and implemented based on the an analog control chip. The obtained results show that the interleaved PFC by means of one cycle control and current synthesis is feasible, capable of reaching a good suppression effect of ripple current.


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