Chip Level Simulation of Substrate Noise Coupling and Interference in RF ICs with CMOS Digital Noise Emulator

Naoya AZUMA; Shunsuke SHIMAZAKI; Noriyuki MIURA; Makoto NAGATA; Tomomitsu KITAMURA; Satoru TAKAHASHI; Motoki MURAKAMI; Kazuaki HORI; Atsushi NAKAMURA; Kenta TSUKAMOTO; Mizuki IWANAMI; Eiji HANKUI; Sho MUROGA; Yasushi ENDO; Satoshi TANAKA; Masahiro YAMAGUCHI

doi:10.1587/transele.e97.c.546

Chip Level Simulation of Substrate Noise Coupling and Interference in RF ICs with CMOS Digital Noise Emulator

IEICE Transactions on Electronics ◽

10.1587/transele.e97.c.546 ◽

2014 ◽

Vol E97.C (6) ◽

pp. 546-556

Author(s):

Naoya AZUMA ◽

Shunsuke SHIMAZAKI ◽

Noriyuki MIURA ◽

Makoto NAGATA ◽

Tomomitsu KITAMURA ◽

...

Keyword(s):

Substrate Noise ◽

Noise Coupling ◽

Substrate Noise Coupling ◽

Rf Ics

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Modeling and Analysis of Substrate Noise Coupling in Analog and RF ICs

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e95.a.430 ◽

2012 ◽

Vol E95-A (2) ◽

pp. 430-438 ◽

Cited By ~ 6

Author(s):

Makoto NAGATA

Keyword(s):

Substrate Noise ◽

Modeling And Analysis ◽

Noise Coupling ◽

Substrate Noise Coupling ◽

Rf Ics

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Measurements and simulation of substrate noise coupling in RF ICs with CMOS digital noise emulator

2013 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo) ◽

10.1109/emccompo.2013.6735170 ◽

2013 ◽

Cited By ~ 8

Author(s):

N. Azuma ◽

S. Shimazaki ◽

N. Miura ◽

M. Nagata ◽

T. Kitamura ◽

...

Keyword(s):

Substrate Noise ◽

Noise Coupling ◽

Substrate Noise Coupling ◽

Rf Ics

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Experimental results and simulation of substrate noise coupling via planar spiral inductor in RF ICs

International Electron Devices Meeting. IEDM Technical Digest ◽

10.1109/iedm.1997.650393 ◽

2002 ◽

Cited By ~ 12

Author(s):

A. Pun ◽

T. Yeung ◽

J. Lau ◽

F.J.R. Clement ◽

D. Su

Keyword(s):

Experimental Results ◽

Spiral Inductor ◽

Substrate Noise ◽

Noise Coupling ◽

Substrate Noise Coupling ◽

Rf Ics

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Taking mixed-signal substrate noise coupling simulation to the behavioral level using SystemC

4th IEEE International Workshop on System-on-Chip for Real-Time Applications IWSOC-04 ◽

10.1109/iwsoc.2004.1319878 ◽

2004 ◽

Cited By ~ 3

Author(s):

J. Lundgren ◽

T. Ytterdal ◽

K. Vonbun ◽

M. O'Nils

Keyword(s):

Substrate Noise ◽

Mixed Signal ◽

Noise Coupling ◽

Behavioral Level ◽

Substrate Noise Coupling

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Reducing substrate noise coupling in a 3D-PICS Integrated Passive Device by localized P+ guard rings

2013 IEEE Topical Conference on Biomedical Wireless Technologies, Networks, and Sensing Systems ◽

10.1109/rws.2013.6486722 ◽

2013 ◽

Cited By ~ 1

Author(s):

Miled Ben Salah ◽

Daniel Pasquet ◽

Frederic Voiron ◽

Philippe Descamps ◽

Jean-Luc Lefebvre ◽

...

Keyword(s):

Substrate Noise ◽

Passive Device ◽

Noise Coupling ◽

Substrate Noise Coupling

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Case Studies for the Impacts and Remedies of Substrate Noise Coupling

Analog Circuits And Signal Processing Series - Substrate Noise Coupling in RFICs ◽

10.1007/978-1-4020-8166-8_6 ◽

2008 ◽

pp. 87-104

Author(s):

Ahmed Helmy ◽

Mohammed Ismail

Keyword(s):

Case Studies ◽

Substrate Noise ◽

Noise Coupling ◽

Substrate Noise Coupling

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Modeling and Analysis of Substrate Noise Coupling in Mixed-Signal ICs

Substrate Noise Coupling in Mixed-Signal ASICs ◽

10.1007/0-306-48170-7_3 ◽

2006 ◽

pp. 47-63

Author(s):

Nishath Verghese ◽

Wen Kung Chu ◽

Jim McCanny

Keyword(s):

Substrate Noise ◽

Mixed Signal ◽

Modeling And Analysis ◽

Noise Coupling ◽

Substrate Noise Coupling

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Substrate Noise Coupling in Mixed-Signal ASICs

10.1007/b105382 ◽

2003 ◽

Cited By ~ 51

Keyword(s):

Substrate Noise ◽

Mixed Signal ◽

Noise Coupling ◽

Substrate Noise Coupling

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Mitigation of TSV-substrate noise coupling in 3-D CMOS SOI technology

2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems ◽

10.1109/epeps.2013.6703470 ◽

2013 ◽

Cited By ~ 3

Author(s):

Xiaoxiong Gu ◽

Keith Jenkins

Keyword(s):

Substrate Noise ◽

Noise Coupling ◽

Substrate Noise Coupling ◽

Soi Technology

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An efficient modeling approach for substrate noise coupling analysis

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) ◽

10.1109/iscas.2002.1010684 ◽

2003 ◽

Cited By ~ 6

Author(s):

D. Ozis ◽

K. Mayaram ◽

T. Fiez

Keyword(s):

Substrate Noise ◽

Coupling Analysis ◽

Noise Coupling ◽

Modeling Approach ◽

Substrate Noise Coupling ◽

Efficient Modeling

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