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Case Studies for the Impacts and Remedies of Substrate Noise Coupling
Analog Circuits And Signal Processing Series - Substrate Noise Coupling in RFICs
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10.1007/978-1-4020-8166-8_6
◽
2008
◽
pp. 87-104
Author(s):
Ahmed Helmy
◽
Mohammed Ismail
Keyword(s):
Case Studies
◽
Substrate Noise
◽
Noise Coupling
◽
Substrate Noise Coupling
Download Full-text
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Chip Level Simulation of Substrate Noise Coupling and Interference in RF ICs with CMOS Digital Noise Emulator
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10.1587/transele.e97.c.546
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◽
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◽
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Substrate Noise Coupling
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Taking mixed-signal substrate noise coupling simulation to the behavioral level using SystemC
4th IEEE International Workshop on System-on-Chip for Real-Time Applications IWSOC-04
◽
10.1109/iwsoc.2004.1319878
◽
2004
◽
Cited By ~ 3
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◽
T. Ytterdal
◽
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◽
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Keyword(s):
Substrate Noise
◽
Mixed Signal
◽
Noise Coupling
◽
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◽
Substrate Noise Coupling
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Reducing substrate noise coupling in a 3D-PICS Integrated Passive Device by localized P+ guard rings
2013 IEEE Topical Conference on Biomedical Wireless Technologies, Networks, and Sensing Systems
◽
10.1109/rws.2013.6486722
◽
2013
◽
Cited By ~ 1
Author(s):
Miled Ben Salah
◽
Daniel Pasquet
◽
Frederic Voiron
◽
Philippe Descamps
◽
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◽
...
Keyword(s):
Substrate Noise
◽
Passive Device
◽
Noise Coupling
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Substrate Noise Coupling
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Modeling and Analysis of Substrate Noise Coupling in Mixed-Signal ICs
Substrate Noise Coupling in Mixed-Signal ASICs
◽
10.1007/0-306-48170-7_3
◽
2006
◽
pp. 47-63
Author(s):
Nishath Verghese
◽
Wen Kung Chu
◽
Jim McCanny
Keyword(s):
Substrate Noise
◽
Mixed Signal
◽
Modeling And Analysis
◽
Noise Coupling
◽
Substrate Noise Coupling
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Substrate Noise Coupling in Mixed-Signal ASICs
10.1007/b105382
◽
2003
◽
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Keyword(s):
Substrate Noise
◽
Mixed Signal
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Noise Coupling
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Mitigation of TSV-substrate noise coupling in 3-D CMOS SOI technology
2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems
◽
10.1109/epeps.2013.6703470
◽
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◽
Cited By ~ 3
Author(s):
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◽
Keith Jenkins
Keyword(s):
Substrate Noise
◽
Noise Coupling
◽
Substrate Noise Coupling
◽
Soi Technology
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An efficient modeling approach for substrate noise coupling analysis
2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
◽
10.1109/iscas.2002.1010684
◽
2003
◽
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Author(s):
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◽
K. Mayaram
◽
T. Fiez
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Substrate Noise
◽
Coupling Analysis
◽
Noise Coupling
◽
Modeling Approach
◽
Substrate Noise Coupling
◽
Efficient Modeling
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A surface potential model for predicting substrate noise coupling in integrated circuits
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)
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10.1109/cicc.2004.1358866
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2004
◽
Cited By ~ 3
Author(s):
S. Kristiansson
◽
F. Ingvarson
◽
S.P. Kagganti
◽
K.O. Jeppson
Keyword(s):
Integrated Circuits
◽
Surface Potential
◽
Potential Model
◽
Substrate Noise
◽
Noise Coupling
◽
Substrate Noise Coupling
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A comprehensive geometry-dependent macromodel for substrate noise coupling in heavily doped CMOS processes
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)
◽
10.1109/cicc.2002.1012887
◽
2003
◽
Cited By ~ 31
Author(s):
D. Ozis
◽
T. Fiez
◽
K. Mayaram
Keyword(s):
Substrate Noise
◽
Noise Coupling
◽
Heavily Doped
◽
Substrate Noise Coupling
◽
Cmos Processes
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A Volterra Series Nonlinear Model of the Sampling Distortion in Flash ADCs Due to Substrate Noise Coupling
IEEE Transactions on Circuits & Systems II Express Briefs
◽
10.1109/tcsii.2011.2172714
◽
2011
◽
Vol 58
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◽
pp. 877-881
◽
Cited By ~ 8
Author(s):
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◽
Georges Gielen
Keyword(s):
Nonlinear Model
◽
Volterra Series
◽
Substrate Noise
◽
Noise Coupling
◽
Flash Adcs
◽
Substrate Noise Coupling
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