Cyclists in shared bus lanes: could there be unrecognised impacts on bus journey times?

Proceedings of the Institution of Civil Engineers - Transport ◽

10.1680/jtran.16.00072 ◽

2019 ◽

Vol 172 (3) ◽

pp. 135-151 ◽

Author(s):

Rachel Aldred ◽

Luke Best ◽

Phil Jones

Keyword(s):

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Contention Cognizant Scheduling of Task Graphs on Shared Bus based Heterogeneous Platforms

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2021.3059569 ◽

2021 ◽

pp. 1-1

Author(s):

Sanjit Kumar Roy ◽

Rajesh Devaraj ◽

Arnab Sarkar

Keyword(s):

Heterogeneous Platforms ◽

Task Graphs ◽

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Design and implementation of an ABR server in a shared-bus ATM switch

Proceedings ISCC 2000. Fifth IEEE Symposium on Computers and Communications ◽

10.1109/iscc.2000.860665 ◽

2002 ◽

Author(s):

E. Zervanos ◽

G. Stassinopoulos

Keyword(s):

Design And Implementation ◽

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Experience with mean value analysis model for evaluating shared bus, throughput-oriented multiprocessors

Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems - SIGMETRICS '91 ◽

10.1145/107971.107982 ◽

1991 ◽

Author(s):

Mee-Chow Chiang ◽

Gurindar S. Sohi

Keyword(s):

Analysis Model ◽

Value Analysis ◽

Mean Value Analysis ◽

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Shared-Bus and Shared-Memory-Based Switch/Router Architectures

Switch/Router Architectures ◽

10.1002/9781119486220.ch3 ◽

2018 ◽

pp. 43-60 ◽

Keyword(s):

Shared Memory ◽

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Communication strategies for shared-bus embedded multiprocessors

Proceedings of the 5th ACM international conference on Embedded software - EMSOFT '05 ◽

10.1145/1086228.1086233 ◽

2005 ◽

Author(s):

Neal K. Bambha ◽

Shuvra S. Bhattacharyya

Keyword(s):

Communication Strategies ◽

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Dynamic Lottery Bus Arbiter for Shared Bus System on Chip: A Design Approach with VHDL

2008 First International Conference on Emerging Trends in Engineering and Technology ◽

10.1109/icetet.2008.193 ◽

2008 ◽

Author(s):

Neeta Doifode ◽

Dinesh Padole ◽

Preeti Bajaj

Keyword(s):

System On Chip ◽

Design Approach ◽

On Chip ◽

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Various arbitration algorithm for on-chip(AMBA) shared bus multi-processor SoC

2016 IEEE Students' Conference on Electrical, Electronics and Computer Science (SCEECS) ◽

10.1109/sceecs.2016.7509330 ◽

2016 ◽

Author(s):

Anurag Shrivastava ◽

Sudhir Kumar Sharma

Keyword(s):

On Chip ◽

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Memory interference in multimicroprocessor systems with a time-shared bus

IEE Proceedings E Computers and Digital Techniques ◽

10.1049/ip-e.1984.0010 ◽

1984 ◽

Vol 131 (2) ◽

pp. 61 ◽

Author(s):

P.A. Grasso ◽

T.S. Dillon ◽

K.E. Forward

Keyword(s):

Memory Interference ◽

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Impact of bus arbitration on the schedulability of real-time shared-bus multiprocessors

Proceedings of TENCON'94 - 1994 IEEE Region 10's 9th Annual International Conference on: 'Frontiers of Computer Technology' ◽

10.1109/tencon.1994.369230 ◽

2002 ◽

Author(s):

Chang Yeol Choi ◽

Heonshik Shin

Keyword(s):

Real Time ◽

Bus Arbitration ◽

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High-Speed Performance Evaluation of a Large-Scale Shared-Bus Digital System

Electronics and Communications in Japan ◽

10.1002/ecj.11743 ◽

2015 ◽

Vol 98 (10) ◽

pp. 57-66 ◽

Author(s):

MASAFUMI KONDO ◽

TOMOYUKI YOKOGAWA ◽

YOICHIRO SATO ◽

KAZUTAMI ARIMOTO

Keyword(s):

Performance Evaluation ◽

Large Scale ◽

Digital System ◽

Speed Performance ◽

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