An Analysis of a Symmetric Circuit Topology for Ultra-Low Power Voltage Scaling in Deep Nanoscale CMOS
Kimiyoshi Usami
◽
Mutsunori Igarashi
◽
Takashi Ishikawa
◽
Masahiro Kanazawa
◽
Masafumi Takahashi
◽
...
Zhicheng Lin
◽
Pui-In Mak
◽
Rui Paulo Martins
Nathan Schemm
◽
Sina Balkir
◽
Michael W. Hoffman
Veni Mohan
◽
Akhilesh Iyer
◽
John Sartori
Veni Mohan
◽
Akhilesh Iyer
◽
John Sartori
2013 ◽
Vol 43
(2)
◽
pp. 233-252
◽
Mohsen Radfar
◽
Kriyang Shah
◽
Jack Singh
K. Usami
◽
M. Igarashi
◽
T. Ishikawa
◽
M. Kanazawa
◽
M. Takahashi
◽
...
Elena K. Weinberg
◽
Mircea R. Stan
Mathieu Coustans
◽
Francois Krummenacher
◽
Maher Kayal
◽
Lucas Rossi
◽
Mario Dellea
◽
...
2011 ◽
Vol 58
(9)
◽
pp. 2189-2200
◽
A. Tajalli
◽
Y. Leblebici