Sheldon B. AkersJr., A truth table method for the synthesis of combinational logic. IRE transactions on electronic computers, vol. EC-10 (1961), pp. 604–615.
1961 ◽
Vol EC-10
(4)
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pp. 604-615
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Keyword(s):
1981 ◽
pp. 393-395
Keyword(s):
2014 ◽
Vol 55
(1)
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pp. 26-32
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1977 ◽
Vol 8
(3)
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pp. 299-301
Keyword(s):
1954 ◽
Vol 10
(2)
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pp. 56-61
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