scholarly journals Application Analysis of Digital Signal Processor DSP in Logging Instrument

2019 ◽  
Vol 3 (2) ◽  
Author(s):  
Jie Lian

In today's world, the development of economy has led to the continuous development and evolution of science and technology. Computer technology and large-scale integration technology have been well developed and applied, followed by the technology of digital signal processing DSP production and application. In the field of logging, the application function of this technology plays a key role. It not only allows the imaging logging technology to be further developed, but also enables fast and accurate processing of downhole signals. Therefore, among many logging tools today, digital signal processing DSPs have been widely used, and their functions have been fully utilized. This paper analyzes the application of signal processor DSP in logging instruments. It is hoped that it can play a reference role in the good application and development of logging instruments.

1981 ◽  
Vol 60 (7) ◽  
pp. 1441-1447
Author(s):  
F. E. Barber ◽  
T. J. Bartoli ◽  
R. L. Freyman ◽  
J. A. Grant ◽  
J. Kane ◽  
...  

1984 ◽  
Vol 21 (1) ◽  
pp. 47-61 ◽  
Author(s):  
Trevor J. Terrell ◽  
Robert J. Simpson

The concepts of single-chip digital signal processing are presented via a student-oriented tutorial/laboratory case study. This involves the design of a highpass digital filter using the first-difference design method and its implementation using the NEC μPD7720 Signal Processor.


1993 ◽  
Vol 47 (9) ◽  
pp. 1345-1349 ◽  
Author(s):  
Christopher J. Manning ◽  
Peter R. Griffiths

A novel step-scan FT-IR spectrometer incorporating a digital signal processor for demodulation of the detector signal is described. The potential advantages of this method of signal processing are discussed and illustrated. The instrument is based on a commercial cube-corner interferometer which has been modified by replacement of the drive motor with a stepper motor-micrometer and piezoelectric transducer combination. The interferometer retardation is feedback controlled by a 486–50 personal computer, which also controls the digital signal processor and collects spectral data. More than one phase modulation frequency can be imposed simultaneously, allowing for a multiplex advantage in photoacoustic depth profiling. Digital signal processing allows for simultaneous demodulation of multiple frequencies which would normally require several lock-in amplifiers. Data that illustrate the feasibility of these concepts are presented. The suitability of this instrument for double-modulation step-scan FT-IR measurements such as polymer stretching and electrochemically modulated step-scan FT-IR is also discussed.


2015 ◽  
Vol 719-720 ◽  
pp. 534-537
Author(s):  
Wen Hua Ye ◽  
Huan Li

With the development of digital signal processing technology, the demand on the signal processor speed has become increasingly high. This paper describes the hardware design of carrier board in high-speed signal processing module, which using Xilinx's newest Virtex-7 FPGA family XC7VX485T chip, and applying high-speed signal processing interface FMC to transport and communicate high-speed data between carrier board and daughter card with high-speed ADC and DAC. This design provides a hardware implementation and algorithm verification platform for high-speed digital signal processing system.


Author(s):  
Ansiya Eshack ◽  
S. Krishnakumar

<span>With an ever growing demand for low-power devices, it is a general trend to search for ways to reduce the power consumption of a system. Multipliers are an important requirement in applications linked to Digital Signal Processing, Communication Systems, Optical Computing, Nanotechnology, Low-Power Very Large Scale Integration and Quantum Computing. Conventional mathematics makes multiplication a very long and time consuming process. The use of Vedic mathematics has led to great reduction in the time required for such calculations. The excessive use of Urdhava Tiryakbhyam sutra in multiplication surely proves its effectiveness and simplicity in this domain. This sutra supports the process of pipelining, a method employed in reduction of the power used by a system. Reversible logic has been gaining demand due to its low-power capabilities and is currently being used in many computing applications. The paper proposes two multiplier systems: one design employs the Urdhava Tiryakbhyam sutra along with pipelining and the second uses reversible logic gates into the first design. These proposed systems provide very less delay for result computation and low hardware utilization when compared to non-pipelined Vedic multipliers.</span>


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