scholarly journals Place Physical Address

2020 ◽  
Author(s):  
Keyword(s):  

1999 ◽  
Vol 7 (3-4) ◽  
pp. 195-209 ◽  
Author(s):  
John B. Carter ◽  
Wilson C. Hsieh ◽  
Leigh B. Stoller ◽  
Mark Swanson ◽  
Lixin Zhang ◽  
...  

Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application‐specific optimizations through configurable physical address remapping. By remapping physical addresses, applications control how their data is accessed and cached, improving their cache and bus utilization. Second, Impulse supports prefetching at the memory controller, which can hide much of the latency of DRAM accesses. Because it requires no modification to processor, cache, or bus designs, Impulse can be adopted in conventional systems. In this paper we describe the design of the Impulse architecture, and show how an Impulse memory system can improve the performance of memory‐bound scientific applications. For instance, Impulse decreases the running time of the NAS conjugate gradient benchmark by 67%. We expect that Impulse will also benefit regularly strided, memory‐bound applications of commercial importance, such as database and multimedia programs.



2018 ◽  
Vol 7 (2.7) ◽  
pp. 473
Author(s):  
B Bala Bharathi ◽  
E Suresh Babu

Detecting and defending against insider and outsider threats seems to be a major challenge for information security system. such that cyber-attacks pose a silent threat for a company with a havoc likely to be in billions, besides slaughtering investor confidence and denting brand image. Long-established and ongoing solutions target mainly to assimilate many known threats in the form of consistent information such as logical & physical address, etc. into detection and blocking techniques. Our proposed solution elongates forward by using Cyber threat intelligence (CTI) which is used to inform decisions timely regarding subject response to the menance or hazard, where the vulnerable systems are identified using honeypot, through integration of logs for detecting network, host intrusions using SIEM technology which would efficiently manage the occurrence of threat by using cyber hazard management to mitigate the cyber threat actions, fortify incident response efforts and enhance your overall security posture.  



2012 ◽  
Vol 241-244 ◽  
pp. 1209-1212
Author(s):  
Ju Hong Wen ◽  
Wei Jiang Wang ◽  
Wei Gao ◽  
Xiao Nan Fan

NAND flash would generate invalid blocks during its manufacturing and using, and the invalid block management is a key point of NAND flash. By studying the structure and storage rules of NAND flash, this paper put forward a wear-levelling algorithm against the invalid blocks of NAND flash based on FPGA. This algorithm use invalid block table and logical-physical address mapping table to manage the invalid blocks and do wear-levelling. The design is implemented by VHDL, and successfully realized the wear-levelling and the reading and writing operations of NAND flash.



Author(s):  
Balaraju J. ◽  
P.V.R.D. Prasada Rao

This paper proposes a novel node management for the distributed system using DNA hiding and generating a unique key by combing a unique physical address (MAC) of node and hostname. This mechanism provides better node management for the Hadoop cluster providing adding and deletion node mechanism by using limited computations and providing better node security from hackers. The objective of this paper is to design an algorithm to implement node-sensitive data hiding using DNA sequences and provide security to the node and its data from hackers.





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