Perfect Codes in Cartesian Products of 2-Paths and Infinite Paths

We introduce and study a common generalization of 1-error binary perfect codes and perfect single error correcting codes in Lee metric, namely perfect codes on products of paths of length 2 and of infinite length. Both existence and nonexistence results are given.

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Complexity of Error-Correcting Code Based on Nearest Neighbor Search Algorithm

Mathematical Problems of Computer Science ◽

10.51408/1963-0030 ◽

2019 ◽

pp. 7-20

Author(s):

Levon Arsalanyan ◽

Hayk Danoyan

Keyword(s):

Time Complexity ◽

Nearest Neighbor ◽

Search Algorithm ◽

Error Correcting Code ◽

Error Correcting Codes ◽

Code Word ◽

Nearest Neighbor Search ◽

Perfect Codes ◽

Neighbor Search ◽

Weight Structures

The Nearest Neighbor search algorithm considered in this paper is well known (Elias algorithm). It uses error-correcting codes and constructs appropriate hash-coding schemas. These schemas preprocess the data in the form of lists. Each list is contained in some sphere, centered at a code-word. The algorithm is considered for the cases of perfect codes, so the spheres and, consequently, the lists do not intersect. As such codes exist for the limited set of parameters, the algorithm is considered for some other generalizations of perfect codes, and then the same data point may be contained in different lists. A formula of time complexity of the algorithm is obtained for these cases, using coset weight structures of the mentioned codes

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Linear perfect codes of infinite length over infinite fields

Sibirskie Elektronnye Matematicheskie Izvestiya ◽

10.33048/semi.2020.17.088 ◽

2020 ◽

Vol 17 ◽

pp. 1165-1182

Author(s):

S. A. Malyugin

Keyword(s):

Infinite Length ◽

Perfect Codes

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Perfect codes on the towers of Hanoi graph

Bulletin of the Australian Mathematical Society ◽

10.1017/s0004972700031774 ◽

1998 ◽

Vol 57 (3) ◽

pp. 367-376 ◽

Cited By ~ 10

Author(s):

Chi-Kwong Li ◽

Ingrid Nelson

Keyword(s):

Short Proof ◽

Error Correcting Code ◽

Error Correcting Codes ◽

Perfect Codes ◽

Towers Of Hanoi

We characterise all the perfect k-error correcting codes that can be defined on the graph associated with the Towers of Hanoi puzzle. In particular, a short proof for the existence of 1-error correcting code on such a graph is given.

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From T(m) triangular graphs to single-error-correcting codes

Applicable Algebra, Error-Correcting Codes, Combinatorics and Computer Algebra - Lecture Notes in Computer Science ◽

10.1007/bfb0039174 ◽

2006 ◽

pp. 5-12

Author(s):

J. M. Basart ◽

L. Huguet

Keyword(s):

Error Correcting Codes ◽

Single Error

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A Single Error Correcting Code with One-Step Group Partitioned Decoding Based on Shared Majority-Vote

Electronics ◽

10.3390/electronics9050709 ◽

2020 ◽

Vol 9 (5) ◽

pp. 709

Author(s):

Abhishek Das ◽

Nur A. Touba

Keyword(s):

Optimization Technique ◽

Error Correcting Code ◽

Latin Square ◽

Error Correcting Codes ◽

Trade Off ◽

Cache Memories ◽

Hamming Codes ◽

Single Error ◽

Memory Overhead ◽

On Chip

Technology scaling has led to an increase in density and capacity of on-chip caches. This has enabled higher throughput by enabling more low latency memory transfers. With the reduction in size of SRAMs and development of emerging technologies, e.g., STT-MRAM, for on-chip cache memories, reliability of such memories becomes a major concern. Traditional error correcting codes, e.g., Hamming codes and orthogonal Latin square codes, either suffer from high decoding latency, which leads to lower overall throughput, or high memory overhead. In this paper, a new single error correcting code based on a shared majority voting logic is presented. The proposed codes trade off decoding latency in order to improve the memory overhead posed by orthogonal Latin square codes. A latency optimization technique is also proposed which lowers the decoding latency by incurring a slight memory overhead. It is shown that the proposed codes achieve better redundancy compared to orthogonal Latin square codes. The proposed codes are also shown to achieve lower decoding latency compared to Hamming codes. Thus, the proposed codes achieve a balanced trade-off between memory overhead and decoding latency, which makes them highly suitable for on-chip cache memories which have stringent throughput and memory overhead constraints.

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