Formal Verification Methods

2015 ◽  
pp. 10-20
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Formal Methods ◽  
Theorem Proving ◽  
Critical Systems ◽  
Verification Methods

This chapter provides a brief introduction to the domain of formal methods (Boca, Bowen, & Siddiqi, 2009) and the most commonly used verification methods (i.e., theorem proving [Harrison, 2009] and model checking [Baier & Katoen, 2008]). Due to their inherent precision, formal verification methods are increasingly being used in modeling and verifying safety and financial-critical systems these days.

Research on Hardware Design Verification Methods

2012 ◽  
Vol 588-589 ◽  
pp. 1208-1213
Author(s):  
Jie Zhang ◽  
Jian Qi ◽  
Yong Guan
Keyword(s):  
Model Checking ◽  
Formal Methods ◽  
Theorem Proving ◽  
Hardware Design ◽  
Equivalence Checking ◽  
Design Verification ◽  
Future Directions ◽  
Existing Problems ◽  
Verification Methods ◽  
Simulation Based

This paper first summarizes the existing basic theories and methods of hardware design verification. Then it analyzes and compares the simulation-based verification and formal methods-based verification, and discusses Equivalence Checking, Model Checking and Theorem Proving in detail. Finally, it points out the existing problems and the future directions in the field.

Formal Verification of Control System Software

2019 ◽  
Author(s):  
Pierre-Loïc Garoche
Keyword(s):  
Control System ◽  
Formal Verification ◽  
Formal Analysis ◽  
Critical Systems ◽  
System Software ◽  
Unified Approach ◽  
Verification Methods ◽  
Autonomous Cars ◽  
Computer Scientists ◽  
Verification Techniques

The verification of control system software is critical to a host of technologies and industries, from aeronautics and medical technology to the cars we drive. The failure of controller software can cost people their lives. This book provides control engineers and computer scientists with an introduction to the formal techniques for analyzing and verifying this important class of software. Too often, control engineers are unaware of the issues surrounding the verification of software, while computer scientists tend to be unfamiliar with the specificities of controller software. The book provides a unified approach that is geared to graduate students in both fields, covering formal verification methods as well as the design and verification of controllers. It presents a wealth of new verification techniques for performing exhaustive analysis of controller software. These include new means to compute nonlinear invariants, the use of convex optimization tools, and methods for dealing with numerical imprecisions such as floating point computations occurring in the analyzed software. As the autonomy of critical systems continues to increase—as evidenced by autonomous cars, drones, and satellites and landers—the numerical functions in these systems are growing ever more advanced. The techniques presented here are essential to support the formal analysis of the controller software being used in these new and emerging technologies.

The Role of Formal Methods in Software Development for Railway Applications

2014 ◽  
pp. 1103-1118
Author(s):  
Alessandro Fantechi
Keyword(s):  
Model Checking ◽  
Software Development ◽  
Formal Verification ◽  
Formal Methods ◽  
Industrial Application ◽  
Safety Certification ◽  
Software Designers ◽  
Recent Trends ◽  
Railway Domain

Formal methods for thirty years have promised to be the solution for the safety certification headaches of railway software designers. This chapter looks at the current industrial application of formal methods in the railway domain. After a recall of the dawning of formal methods in this domain, recent trends are presented that focus in particular on formal verification by means of model checking engines, with its potential and limitations. The paper ends with a perspective into the next future, in which formal methods will be expected to pervade in more respects the production of railway software and systems.

High-Integrity Model-Based Development

2015 ◽  
pp. 479-499
Author(s):  
K. Lano ◽  
S. Kolahdouz-Rahimi
Keyword(s):  
Formal Verification ◽  
Formal Methods ◽  
Model Transformations ◽  
Critical Systems ◽  
Model Based ◽  
The Subject ◽  
High Integrity

Model-Based Development (MBD) has become increasingly used for critical systems, and it is the subject of the MBDV supplement to the DO-178C standard. In this chapter, the authors review the requirements of DO-178C for model-based development, and they identify ways in which MBD can be combined with formal verification to achieve DO-178C requirements for traceability and verifiability of models. In particular, the authors consider the implications for model transformations, which are a central part of MBD approaches, and they identify how transformations can be verified using formal methods tools.

The Role of Formal Methods in Software Development for Railway Applications

2012 ◽  
pp. 282-297 ◽  
Author(s):  
Alessandro Fantechi
Keyword(s):  
Model Checking ◽  
Software Development ◽  
Formal Verification ◽  
Formal Methods ◽  
Industrial Application ◽  
Safety Certification ◽  
Software Designers ◽  
Recent Trends ◽  
Railway Domain

Formal methods for thirty years have promised to be the solution for the safety certification headaches of railway software designers. This chapter looks at the current industrial application of formal methods in the railway domain. After a recall of the dawning of formal methods in this domain, recent trends are presented that focus in particular on formal verification by means of model checking engines, with its potential and limitations. The paper ends with a perspective into the next future, in which formal methods will be expected to pervade in more respects the production of railway software and systems.

High-Integrity Model-Based Development

2013 ◽  
pp. 1-17
Author(s):  
Kevin Lano ◽  
Shekoufeh Kolahdouz-Rahimi
Keyword(s):  
Formal Verification ◽  
Formal Methods ◽  
Model Transformations ◽  
Critical Systems ◽  
Model Based ◽  
The Subject ◽  
High Integrity

Model-Based Development (MBD) has become increasingly used for critical systems, and it is the subject of the MBDV supplement to the DO-178C standard. In this chapter, the authors review the requirements of DO-178C for model-based development, and they identify ways in which MBD can be combined with formal verification to achieve DO-178C requirements for traceability and verifiability of models. In particular, the authors consider the implications for model transformations, which are a central part of MBD approaches, and they identify how transformations can be verified using formal methods tools.

Practical Model Checking on FPGAs

2021 ◽  
Vol 14 (2) ◽  
pp. 1-18
Author(s):  
Shenghsun Cho ◽  
Mrunal Patel ◽  
Michael Ferdman ◽  
Peter Milder
Keyword(s):  
Model Checking ◽  
Software Verification ◽  
General Purpose ◽  
Critical Systems ◽  
Preparation Time ◽  
Successor State ◽  
Verification Methods ◽  
Implementation Stages ◽  
Place And Route ◽  
Fpga Acceleration

Software verification is an important stage of the software development process, particularly for mission-critical systems. As the traditional methodology of using unit tests falls short of verifying complex software, developers are increasingly relying on formal verification methods, such as explicit state model checking, to automatically verify that the software functions properly. However, due to the ever-increasing complexity of software designs, model checking cannot be performed in a reasonable amount of time when running on general-purpose cores, leading to the exploration of hardware-accelerated model checking. FPGAs have been demonstrated to be promising verification accelerators, exhibiting nearly three orders of magnitude speedup over software. Unfortunately, the “FPGA programmability wall,” particularly the long synthesis and place-and-route times, block the general adoption of FPGAs for model checking. To address this problem, we designed a runtime-programmable pipeline specifically for model checkers on FPGAs to minimize the “preparation time” before a model can be checked. Our design of the successor state generator and the state validator modules enables FPGA-acceleration of model checking without incurring the time-consuming FPGA implementation stages, reducing the preparation time before checking a model from hours to less than a minute, while incurring only a 26% execution time overhead compared to model-specific implementations.

scholarly journals PLC Program Translation for Verification Purposes

2017 ◽  
Vol 61 (2) ◽  
pp. 151 ◽  
Author(s):  
Dániel Darvas ◽  
István Majzik ◽  
Enrique Blanco Viñuela
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Programming Languages ◽  
Programming Language ◽  
Translation Method ◽  
Programmable Logic ◽  
Program Unit ◽  
Verification Methods ◽  
Plc Program ◽  
Safety Plc

Programmable logic controllers are typically programmed in one of the five languages defined in the IEC 61131 standard. While the ability to choose the appropriate language for each program unit may be an advantage for the developers, it poses a serious challenge to verification methods. In this paper we analyse and compare these languages to show that the ST programming language can efficiently and conveniently represent all PLC languages for formal verification purposes. Furthermore, we provide a translation method from IL to ST programming languages (for the Siemens implementation), together with a sketch of proof for its correctness. This allows the usage of the ST-based PLCverif model checking method for safety PLC programs.

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