Real-Time Image Distortion Correction System Based on Improved Bilinear Interpolation Algorithm

This paper brings about an image distortion correction system based on FPGA with low latency and high quality. In line with image format characteristics, the system adopted the buffering mechanism that storing data in odd and even line/column zones respectively to minimize memory occupancy. Furthermore, an improved bilinear interpolation algorithm is put forward in order to improve edge definition. The experiment results demonstrated that the hardware system run steadily under the condition of high resolution and frequency, in addition, the edge effect improved greatly after image processing.