A Satellite Remote Sensing Based Land Surface Temperature Retrieval From Landsat Tm Data.

Author(s):  
OO Ifatimehin ◽  
S Adeyemi,
2014 ◽  
Vol 1010-1012 ◽  
pp. 1276-1279 ◽  
Author(s):  
Yin Tai Na

The three commonly used remote sensing land surface temperature retrieval methods are described, namely single-window algorithm, split window algorithm and multi-channel algorithm, which have their advantages and disadvantages. The land surface temperature (LST) of study area was retrieved with multi-source remote sensing data. LST of study area was retrieved with the split window algorithm on January 10, 2003 and November 19, 2003 which is comparatively analyzed with the LST result of ETM+data with the single-window algorithm and the LST result of ASTER data with multi channel algorithm in the same period. The results show that land surface temperature of different land features are significantly different, where the surface temperature of urban land is the highest, and that of rivers and lakes is the lowest, followed by woodland. It is concluded that the expansion of urban green space and protection of urban water can prevent or diminish the urban heat island.


2007 ◽  
Author(s):  
H. S. Lim ◽  
M. Z. MatJafri ◽  
K. Abdullah ◽  
N. M. Saleh ◽  
Sultan AlSultan

Author(s):  
Assaad El Makhloufi ◽  
Nisrine Chekroun ◽  
Noha Tagmouti ◽  
Samir El Adib ◽  
Naoufal Raissouni

The trend in satellite remote sensing assignments has continuously been concerning using hardware devices with more flexibility, smaller size, and higher computational power. Therefore, field programmable gate arrays (FPGA) technology is often used by the developers of the scientific community and equipment for carrying out different satellite remote sensing algorithms. This article explains hardware implementation of land surface temperature split window (LST-SW) algorithm based on the FPGA. To get a high-speed process and real-time application, VHSIC hardware description language (VHDL) was employed to design the LST-SW algorithm. The paper presents the benefits of the used Virtex-4QV of radiation tolerant series FPGA. The experimental results revealed that the suggested implementation of the algorithm using Virtex4QV achieved higher throughput of 435.392 Mbps, and faster processing time with value of 2.95 ms. Furthermore, a comparison between the proposed implementation and existing work demonstrated that the proposed implementation has better performance in terms of area utilization; 1.17% reduction in number of Slice used and 1.06% reduction in of LUTs. Moreover, the significant advantage of area utilization would be the none use of block RAMs comparing to existing work using three blocks RAMs. Finally, comparison results show improvements using the proposed implementation with rates of 2.28% higher frequency, 3.66 x higher throughput, and 1.19% faster processing time.


2004 ◽  
Vol 90 (4) ◽  
pp. 434-440 ◽  
Author(s):  
José A. Sobrino ◽  
Juan C. Jiménez-Muñoz ◽  
Leonardo Paolini

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