scholarly journals A Novel Analytical Model for Network-on-Chip using Semi-Markov Process

2011 ◽  
Vol 11 (1) ◽  
pp. 111-118 ◽  
Author(s):  
J. WANG ◽  
Y. LI ◽  
Q. PENG
Keyword(s):  
Markov Process ◽  
Analytical Model ◽  
Network On Chip ◽  
Semi Markov Process ◽  
On Chip

An analytical model for segmented bus enhanced network on chip

2017 ◽  
Author(s):  
Hossein Bastan ◽  
Mohammad Ali Montazeri ◽  
Amin Ghalami Osgouei ◽  
Amir Khorsandi ◽  
Hossein Saidi
Keyword(s):  
Analytical Model ◽  
Network On Chip ◽  
On Chip

An analytical model for Network-on-Chip with finite input buffer

2010 ◽  
Vol 5 (1) ◽  
pp. 126-134 ◽  
Author(s):  
Jian Wang ◽  
Yu-bai Li ◽  
Chang Wu
Keyword(s):  
Analytical Model ◽  
Network On Chip ◽  
Input Buffer ◽  
On Chip

A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model

2017 ◽  
Vol 25 (11) ◽  
pp. 3099-3112 ◽  
Author(s):  
Khanh N. Dang ◽  
Akram Ben Ahmed ◽  
Xuan-Tu Tran ◽  
Yuichi Okuyama ◽  
Abderazek Ben Abdallah
Keyword(s):  
Analytical Model ◽  
Reliability Assessment ◽  
Network On Chip ◽  
On Chip ◽  
Comprehensive Reliability

VLSI Design Of Low Energy Modeling For Network On Chip (NoC) Applications

2014 ◽  
Vol 5 (1) ◽  
pp. 27-32
Author(s):  
Jeeva Anusha ◽  
◽  
V. Thrimurthulu ◽  
Keyword(s):  
Vlsi Design ◽  
Network On Chip ◽  
Energy Modeling ◽  
Low Energy ◽  
On Chip

Pre-allocated Path Based Low Latency Router Architecture for Network-on-chip

2014 ◽  
Vol 35 (2) ◽  
pp. 341-346
Author(s):  
Xiao-fu Zheng ◽  
Hua-xi Gu ◽  
Yin-tang Yang ◽  
Zhong-fan Huang
Keyword(s):  
Network On Chip ◽  
Low Latency ◽  
Router Architecture ◽  
On Chip
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