scholarly journals An Overview of Charge Pump for Phase Lock Loop System for High Frequency Application.

Author(s):  
VISHAL D. JAISWAL ◽  
Vrushali G. Nasre

Phase lock loop is fundamental buliding block of modern communication system. Phase lock loop are typically used to provide local oscillator function in radio reciver or transmitter. The design methodology and test result of charge pump structure for phase lock loop application are presented. The structure is composed to two charge/ discharge block. This paper provides study of various charge pump and discuss the technology that is used to design charge pump.

Author(s):  
VISHAL D. JAISWAL

Phase lock loop is fundamental building block of modern communication system. Phase lock loop are typically used to provide local oscillator function in radio receiver or transmitter. The design methodology and test result of charge pump structure for phase lock loop application are presented. The structure is composed of two charge / discharge block. This paper provides study of various charge pump and discuss the technologies that is used to design charge pump.


1989 ◽  
Vol 6 (2) ◽  
pp. 217
Author(s):  
Sang Hag Lee ◽  
Dong Gyo Jeong ◽  
Joon Ha Lee ◽  
Kwan Ho Lee ◽  
Young Jo Kim ◽  
...  

Author(s):  
Deepak Balodi ◽  
Rahul Misra

The design of a high frequency (L Band), low power (2.75mW) Phase Lock Loops with a 350nm Complementary Metal Oxide Semi Conductor (CMOS) technology has been represented. The comparison of Current Starved Voltage Controlled Oscillator (CSVCO) and Differential pair VCO is performed and analyzed for low power and high frequency analysis respectively. Each component of Phase Lock Loop (PLL) is designed with 350nm CMOS technology in Design Architect Integrated Circuit Station by Mentor Graphics (Eldo-Net) as simulator. In this paper both the standard configurations have been simulated under the same environment and results are analyzed for two most important Very Large Scale Integration (VLSI)constraints, Speed (High frequency range) and Power consumption. The high speed and locking performance of the Differential pair VCO has been evaluated against the lower power consumption benefit of CSVCO.


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