Network on Chip for 3D Mesh Structure with Enhanced Security Algorithm in HDL Environment

International Journal of Computer Applications ◽

10.5120/9638-4309 ◽

2012 ◽

Vol 59 (17) ◽

pp. 6-12 ◽

Author(s):

Adesh Kumar ◽

Sonal Singhal ◽

Piyush Kuchhal

Keyword(s):

Network On Chip ◽

Mesh Structure ◽

3D Mesh ◽

Security Algorithm ◽

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A novel Network-on-Chip security algorithm for tolerating Byzantine faults

2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ◽

10.1109/dft50435.2020.9250906 ◽

2020 ◽

Author(s):

Soultana Ellinidou ◽

Gaurav Sharma ◽

Olivier Markowitch ◽

Guy Gogniat ◽

Jean-Michel Dricot

Keyword(s):

Network On Chip ◽

Byzantine Faults ◽

Security Algorithm ◽

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Secure Data Routing using 4-H function of Improved TACIT Security Algorithm for Network-On-Chip

Asian Journal of Research in Social Sciences and Humanities ◽

10.5958/2249-7315.2016.01330.7 ◽

2016 ◽

Vol 6 (12) ◽

pp. 804

Author(s):

K. Veera Kumar ◽

N. Ashok Kumar

Keyword(s):

Network On Chip ◽

Data Routing ◽

Secure Data ◽

Security Algorithm ◽

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TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning

2015 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2015.9 ◽

2015 ◽

Author(s):

Kanchan Manna ◽

Vadapalli Shanmukha Sri Teja ◽

Santanu Chattopadhyay ◽

Indranil Sengupta

Keyword(s):

Network On Chip ◽

Chip Design ◽

3D Mesh ◽

On Chip ◽

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Accurate Performance Analysis of 3D Mesh Network on Chip Architectures

2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) ◽

10.1109/conecct.2018.8482383 ◽

2018 ◽

Author(s):

Bheemappa Halavar ◽

Basavaraj Talawar

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Mesh Network ◽

3D Mesh ◽

Accurate Performance ◽

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A study on thermal impacts of routing algorithms for 3D mesh-based network-on-chip

IET International Conference on Information Science and Control Engineering 2012 (ICISCE 2012) ◽

10.1049/cp.2012.2358 ◽

2012 ◽

Author(s):

Menwang Xie ◽

Sha Li ◽

Min Yin ◽

Yao Li

Keyword(s):

Network On Chip ◽

Routing Algorithms ◽

3D Mesh ◽

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A thermal-aware mapping algorithm for 3D Mesh Network-on-Chip architecture

2013 IEEE 10th International Conference on ASIC ◽

10.1109/asicon.2013.6811834 ◽

2013 ◽

Author(s):

Gui Feng ◽

Fen Ge ◽

Shuang Yu ◽

Ning Wu

Keyword(s):

Network On Chip ◽

Mesh Network ◽

3D Mesh ◽

Mapping Algorithm ◽

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OcNoC: Efficient One-Cycle Router Implementation for 3D Mesh Network-on-Chip

2015 28th International Conference on VLSI Design ◽

10.1109/vlsid.2015.23 ◽

2015 ◽

Author(s):

Ramon Fernandes ◽

Lucas Brahm ◽

Thais Webber ◽

Rodrigo Cataldo ◽

Leticia B. Poehls ◽

...

Keyword(s):

Network On Chip ◽

Mesh Network ◽

3D Mesh ◽

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Scalable Design and Synthesis of 3D Mesh Network on Chip

Proceeding of International Conference on Intelligent Communication, Control and Devices - Advances in Intelligent Systems and Computing ◽

10.1007/978-981-10-1708-7_75 ◽

2016 ◽

pp. 661-666

Author(s):

Arpit Jain ◽

Rakesh Dwivedi ◽

Adesh Kumar ◽

Sanjeev Sharma

Keyword(s):

Network On Chip ◽

Mesh Network ◽

3D Mesh ◽

Design And Synthesis ◽

On Chip ◽

Scalable Design

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Preconcerted wormhole routing algorithm for Mesh structure based on the network on chip

2012 International Conference on Information Management, Innovation Management and Industrial Engineering ◽

10.1109/iciii.2012.6339801 ◽

2012 ◽

Author(s):

Wang Hao ◽

Wu Ling

Keyword(s):

Routing Algorithm ◽

Network On Chip ◽

Wormhole Routing ◽

Mesh Structure ◽

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Restricted Turn Model Fault Tolerant Routing Techniques for 3D Mesh Network-on-Chip: An Evaluation

Information and Communication Technology - Advances in Intelligent Systems and Computing ◽

10.1007/978-981-10-5508-9_10 ◽

2017 ◽

pp. 113-122

Author(s):

Ravindra Kumar Saini ◽

Mushtaq Ahmed

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

Mesh Network ◽

3D Mesh ◽

Routing Techniques ◽

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