The Relation between the Common Mode Voltage and the Analog Input Accuracy in Process Control Computer

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.

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Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives

Energies ◽

10.3390/en14020282 ◽

2021 ◽

Vol 14 (2) ◽

pp. 282

Author(s):

Seon-Ik Hwang ◽

Jang-Mok Kim

Keyword(s):

Electromagnetic Interference ◽

Pulse Width Modulation ◽

Motor Drives ◽

Common Mode ◽

Pwm Inverter ◽

Common Mode Voltage ◽

Voltage Vector ◽

Three Phase ◽

The Common ◽

Zero Voltage

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

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Optimization of TSPWM for Common-Mode Voltage Reduction in Vehicular Electric Drive System

World Electric Vehicle Journal ◽

10.3390/wevj13010005 ◽

2021 ◽

Vol 13 (1) ◽

pp. 5

Author(s):

Shang Jiang ◽

Yuan Wang

Keyword(s):

Electric Drive ◽

Drive System ◽

Modulation Method ◽

Time Interval ◽

Common Mode ◽

Common Mode Voltage ◽

Electric Drive System ◽

The Common ◽

Modulation Methods ◽

Zero Voltage

Common-mode voltage can be reduced effectively by optimized modulation methods without increasing additional costs. However, the existing methods cannot satisfy the requirements of the vehicular electric-drive application. This paper optimizes the tri-state voltage modulation method to reduce the common-mode voltage for vehicular electric drive system applications. Firstly, the discontinuous switching issue during sector transition is analyzed. Under the limit of two switching times in one period, multiple alignments combination is proposed to address that issue. Secondly, the zero-voltage time intervals in different modulation ranges are explored. This paper proposes an unsymmetric translation method to reconstruct the voltage vector, and then the minimum zero-voltage time interval is controlled to enough value for safe switching. Finally, the proposed methods have been validated through experiments on a vehicular electric drive system. The results show that the common-mode voltage can be reduced effectively in the whole range with the optimized tri-state voltage modulation method.

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