low power vlsi design
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Low-power VLSI design of arithmetic and logic circuits using the multiple-threshold CMOS technique

2021 ◽  
pp. 624-632
Author(s):  
Prachi Kataria ◽  
Anuwarti Rai ◽  
Aanchal Singh ◽  
Ashwin Anand ◽  
Raman Kapoor ◽  
...  
Keyword(s):  
Low Power ◽  
Vlsi Design ◽  
Logic Circuits ◽  
Multiple Threshold ◽  
Low Power Vlsi Design

Low Power VLSI Design

2016 ◽  
Author(s):  
Angsuman Sarkar ◽  
Swapnadip De ◽  
Manash Chanda ◽  
Chandan Kumar Sarkar
Keyword(s):  
Low Power ◽  
Vlsi Design ◽  
Low Power Vlsi Design

scholarly journals DESIGN &ANALYSIS OF DUAL STACK METHOD FOR FUTURE TECHNOLOGIES

2015 ◽  
pp. 245-250
Author(s):  
P. RAVALI TEJA ◽  
D. AJAY KUMAR
Keyword(s):  
Low Power ◽  
Power Efficiency ◽  
Vlsi Design ◽  
Design Analysis ◽  
Leakage Power ◽  
Power Gating ◽  
Comparison Results ◽  
Different Types ◽  
Low Power Vlsi Design ◽  
Future Technologies

As low power circuits are most popular now a days as the scaling increase the leakage power in the circuit also increases rapidly so for removing these kind of leakages and to provide a better power efficiency we are using many types of power gating techniques. In this paper we are going to analyse the different types of flip-flops using different types of power gated circuits using low power VLSI design techniques and we are going to display the comparison results between different nanometer technologies. The NMOS1mulations were done using Microwind Layout Editor & DSCH software and the results were given below.

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